Ulrich Weigand 33435c4c9c [SystemZ] Add support for IBM z14 processor (2/3) ... This adds support for the new 32-bit vector float instructions of z14. This includes: - Enabling the instructions for the assembler/disassembler. - CodeGen for the instructions, including new LLVM intrinsics. - Scheduler description support for the instructions. - Update to the vector cost function calculations. In general, CodeGen support for the new v4f32 instructions closely matches support for the existing v2f64 instructions. llvm-svn: 308195		2017-07-17 17:42:48 +00:00
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cmp-ext.ll	…
cmpsel.ll	…
div-pow2.ll	[SystemZ] Modelling of costs of divisions with a constant power of 2.	2017-05-17 12:46:26 +00:00
ext-load.ll	…
fp-arith.ll	[SystemZ] Add support for IBM z14 processor (2/3)	2017-07-17 17:42:48 +00:00
fp-cast.ll	[SystemZ] Updated test fp-cast.ll	2017-04-12 12:11:41 +00:00
int-arith.ll	…
int-cast.ll	…
intrinsic-cost-crash.ll	…
lit.local.cfg	[SystemZ] Fix target specific tests	2017-04-12 17:14:46 +00:00
load_store.ll	…
logical.ll	…
memop-folding-int-arith.ll	…
scalar-cmp-cmp-log-sel.ll	…
shuffle.ll	…
vectorinstrs.ll	…