forked from OSchip/llvm-project
69 lines
2.5 KiB
ArmAsm
69 lines
2.5 KiB
ArmAsm
@ RUN: not llvm-mc -triple thumbv7-apple-ios %s -o /dev/null 2>&1 | FileCheck %s
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add sp, r5, #1
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addw sp, r7, #4
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add sp, r3, r2
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add sp, r3, r5, lsl #3
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sub sp, r5, #1
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subw sp, r7, #4
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sub sp, r3, r2
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sub sp, r3, r5, lsl #3
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@CHECK: error: invalid instruction, any one of the following would fix this:
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@CHECK-NEXT: add sp, r5, #1
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@CHECK-NEXT: ^
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@CHECK-NEXT: note: invalid operand for instruction
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@CHECK-NEXT: add sp, r5, #1
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@CHECK-NEXT: ^
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@CHECK-NEXT: note: operand must be a register in range [r0, r12] or r14
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@CHECK-NEXT: add sp, r5, #1
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@CHECK-NEXT: ^
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@CHECK-NEXT: note: operand must be a register in range [r0, r12] or r14
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@CHECK-NEXT: add sp, r5, #1
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@CHECK-NEXT: ^
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@CHECK-NEXT: note: operand must be a register sp
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@CHECK-NEXT: add sp, r5, #1
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@CHECK-NEXT: ^
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@CHECK-NEXT: error: invalid instruction, any one of the following would fix this:
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@CHECK-NEXT: addw sp, r7, #4
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@CHECK-NEXT: ^
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@CHECK-NEXT: note: operand must be a register in range [r0, r12] or r14
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@CHECK-NEXT: addw sp, r7, #4
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@CHECK-NEXT: ^
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@CHECK-NEXT: note: operand must be a register sp
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@CHECK-NEXT: addw sp, r7, #4
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@CHECK-NEXT: ^
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@CHECK-NEXT: error: source register must be sp if destination is sp
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@CHECK-NEXT: add sp, r3, r2
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@CHECK-NEXT: ^
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@CHECK-NEXT: error: source register must be sp if destination is sp
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@CHECK-NEXT: add sp, r3, r5, lsl #3
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@CHECK-NEXT: ^
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@CHECK-NEXT: error: invalid instruction, any one of the following would fix this:
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@CHECK-NEXT: sub sp, r5, #1
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@CHECK-NEXT: ^
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@CHECK-NEXT: note: invalid operand for instruction
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@CHECK-NEXT: sub sp, r5, #1
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@CHECK-NEXT: ^
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@CHECK-NEXT: note: operand must be a register in range [r0, r12] or r14
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@CHECK-NEXT: sub sp, r5, #1
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@CHECK-NEXT: ^
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@CHECK-NEXT: note: operand must be a register in range [r0, r12] or r14
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@CHECK-NEXT: sub sp, r5, #1
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@CHECK-NEXT: ^
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@CHECK-NEXT: note: operand must be a register sp
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@CHECK-NEXT: sub sp, r5, #1
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@CHECK-NEXT: ^
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@CHECK-NEXT: error: invalid instruction, any one of the following would fix this:
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@CHECK-NEXT: subw sp, r7, #4
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@CHECK-NEXT: ^
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@CHECK-NEXT: note: operand must be a register in range [r0, r12] or r14
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@CHECK-NEXT: subw sp, r7, #4
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@CHECK-NEXT: ^
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@CHECK-NEXT: note: operand must be a register sp
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@CHECK-NEXT: subw sp, r7, #4
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@CHECK-NEXT: ^
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@CHECK-NEXT: error: source register must be sp if destination is sp
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@CHECK-NEXT: sub sp, r3, r2
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@CHECK-NEXT: ^
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@CHECK-NEXT: error: source register must be sp if destination is sp
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@CHECK-NEXT: sub sp, r3, r5, lsl #3
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