forked from OSchip/llvm-project
262 lines
8.2 KiB
LLVM
262 lines
8.2 KiB
LLVM
; RUN: llc -enable-machine-outliner=never -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mcpu=cyclone | FileCheck %s
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; RUN: llc -enable-machine-outliner=never -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s
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@var32 = global i32 0
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@var64 = global i64 0
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define void @test_csel(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {
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; CHECK-LABEL: test_csel:
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%tst1 = icmp ugt i32 %lhs32, %rhs32
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%val1 = select i1 %tst1, i32 42, i32 52
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store i32 %val1, i32* @var32
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; CHECK-DAG: mov [[W52:w[0-9]+]], #{{52|0x34}}
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; CHECK-DAG: mov [[W42:w[0-9]+]], #{{42|0x2a}}
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; CHECK: csel {{w[0-9]+}}, [[W42]], [[W52]], hi
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%rhs64 = sext i32 %rhs32 to i64
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%tst2 = icmp sle i64 %lhs64, %rhs64
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%val2 = select i1 %tst2, i64 %lhs64, i64 %rhs64
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store i64 %val2, i64* @var64
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; CHECK: sxtw [[EXT_RHS:x[0-9]+]], {{[wx]}}[[RHS:[0-9]+]]
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; CHECK: cmp [[LHS:x[0-9]+]], w[[RHS]], sxtw
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; CHECK: csel {{x[0-9]+}}, [[LHS]], [[EXT_RHS]], le
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ret void
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; CHECK: ret
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}
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define void @test_floatcsel(float %lhs32, float %rhs32, double %lhs64, double %rhs64) {
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; CHECK-LABEL: test_floatcsel:
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%tst1 = fcmp one float %lhs32, %rhs32
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; CHECK: fcmp {{s[0-9]+}}, {{s[0-9]+}}
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; CHECK-NOFP-NOT: fcmp
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%val1 = select i1 %tst1, i32 42, i32 52
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store i32 %val1, i32* @var32
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; CHECK: mov [[W52:w[0-9]+]], #{{52|0x34}}
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; CHECK: mov [[W42:w[0-9]+]], #{{42|0x2a}}
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; CHECK: csel [[MAYBETRUE:w[0-9]+]], [[W42]], [[W52]], mi
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; CHECK: csel {{w[0-9]+}}, [[W42]], [[MAYBETRUE]], gt
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%tst2 = fcmp ueq double %lhs64, %rhs64
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; CHECK: fcmp {{d[0-9]+}}, {{d[0-9]+}}
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; CHECK-NOFP-NOT: fcmp
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%val2 = select i1 %tst2, i64 9, i64 15
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store i64 %val2, i64* @var64
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; CHECK: orr w[[CONST15:[0-9]+]], wzr, #0xf
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; CHECK: mov {{[wx]}}[[CONST9:[0-9]+]], #{{9|0x9}}
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; CHECK: csel [[MAYBETRUE:x[0-9]+]], x[[CONST9]], x[[CONST15]], eq
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; CHECK: csel {{x[0-9]+}}, x[[CONST9]], [[MAYBETRUE]], vs
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ret void
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; CHECK: ret
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}
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define void @test_csinc(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {
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; CHECK-LABEL: test_csinc:
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; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
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%tst1 = icmp ugt i32 %lhs32, %rhs32
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%inc1 = add i32 %rhs32, 1
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%val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
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store volatile i32 %val1, i32* @var32
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; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]
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; CHECK: csinc {{w[0-9]+}}, [[LHS]], [[RHS]], ls
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%rhs2 = add i32 %rhs32, 42
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%tst2 = icmp sle i32 %lhs32, %rhs2
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%inc2 = add i32 %rhs32, 1
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%val2 = select i1 %tst2, i32 %lhs32, i32 %inc2
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store volatile i32 %val2, i32* @var32
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; CHECK: cmp [[LHS:w[0-9]+]], {{w[0-9]+}}
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; CHECK: csinc {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
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; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
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%rhs3 = sext i32 %rhs32 to i64
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%tst3 = icmp ugt i64 %lhs64, %rhs3
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%inc3 = add i64 %rhs3, 1
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%val3 = select i1 %tst3, i64 %inc3, i64 %lhs64
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store volatile i64 %val3, i64* @var64
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; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
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; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
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%rhs4 = zext i32 %rhs32 to i64
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%tst4 = icmp sle i64 %lhs64, %rhs4
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%inc4 = add i64 %rhs4, 1
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%val4 = select i1 %tst4, i64 %lhs64, i64 %inc4
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store volatile i64 %val4, i64* @var64
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; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
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; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
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ret void
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; CHECK: ret
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}
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define void @test_csinv(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {
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; CHECK-LABEL: test_csinv:
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; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
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%tst1 = icmp ugt i32 %lhs32, %rhs32
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%inc1 = xor i32 -1, %rhs32
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%val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
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store volatile i32 %val1, i32* @var32
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; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]
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; CHECK: csinv {{w[0-9]+}}, [[LHS]], [[RHS]], ls
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%rhs2 = add i32 %rhs32, 42
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%tst2 = icmp sle i32 %lhs32, %rhs2
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%inc2 = xor i32 -1, %rhs32
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%val2 = select i1 %tst2, i32 %lhs32, i32 %inc2
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store volatile i32 %val2, i32* @var32
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; CHECK: cmp [[LHS:w[0-9]+]], {{w[0-9]+}}
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; CHECK: csinv {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
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; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
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%rhs3 = sext i32 %rhs32 to i64
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%tst3 = icmp ugt i64 %lhs64, %rhs3
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%inc3 = xor i64 -1, %rhs3
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%val3 = select i1 %tst3, i64 %inc3, i64 %lhs64
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store volatile i64 %val3, i64* @var64
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; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
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; CHECK: csinv {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
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%rhs4 = zext i32 %rhs32 to i64
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%tst4 = icmp sle i64 %lhs64, %rhs4
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%inc4 = xor i64 -1, %rhs4
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%val4 = select i1 %tst4, i64 %lhs64, i64 %inc4
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store volatile i64 %val4, i64* @var64
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; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
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; CHECK: csinv {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
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ret void
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; CHECK: ret
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}
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define void @test_csinv0(i32 %lhs32, i32 %rhs32, i64 %lhs64, i64 %rhs64) minsize {
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; CHECK-LABEL: test_csinv0:
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%tst1 = icmp ugt i32 %lhs32, %rhs32
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%val1 = select i1 %tst1, i32 0, i32 -1
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store volatile i32 %val1, i32* @var32
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; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]
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; CHECK: csetm {{w[0-9]+}}, ls
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%rhs2 = add i32 %rhs32, 42
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%tst2 = icmp sle i32 %lhs32, %rhs2
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%val2 = select i1 %tst2, i32 -1, i32 %rhs2
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store volatile i32 %val2, i32* @var32
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; CHECK: cmp [[LHS2:w[0-9]+]], [[RHS2:w[0-9]+]]
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; CHECK: csinv {{w[0-9]+}}, [[RHS2]], wzr, gt
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; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
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%rhs3 = mul i64 %rhs64, 19
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%tst3 = icmp ugt i64 %lhs64, %rhs3
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%val3 = select i1 %tst3, i64 %rhs3, i64 -1
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store volatile i64 %val3, i64* @var64
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; CHECK: cmp [[LHS3:x[0-9]+]], [[RHS3:x[0-9]+]]
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; CHECK: csinv {{x[0-9]+}}, [[RHS3]], xzr, hi
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ret void
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; CHECK: ret
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}
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define void @test_csneg(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {
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; CHECK-LABEL: test_csneg:
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; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
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%tst1 = icmp ugt i32 %lhs32, %rhs32
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%inc1 = sub i32 0, %rhs32
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%val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
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store volatile i32 %val1, i32* @var32
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; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]
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; CHECK: csneg {{w[0-9]+}}, [[LHS]], [[RHS]], ls
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%rhs2 = add i32 %rhs32, 42
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%tst2 = icmp sle i32 %lhs32, %rhs2
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%inc2 = sub i32 0, %rhs32
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%val2 = select i1 %tst2, i32 %lhs32, i32 %inc2
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store volatile i32 %val2, i32* @var32
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; CHECK: cmp [[LHS:w[0-9]+]], {{w[0-9]+}}
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; CHECK: csneg {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
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; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
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%rhs3 = sext i32 %rhs32 to i64
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%tst3 = icmp ugt i64 %lhs64, %rhs3
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%inc3 = sub i64 0, %rhs3
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%val3 = select i1 %tst3, i64 %inc3, i64 %lhs64
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store volatile i64 %val3, i64* @var64
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; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
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; CHECK: csneg {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
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%rhs4 = zext i32 %rhs32 to i64
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%tst4 = icmp sle i64 %lhs64, %rhs4
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%inc4 = sub i64 0, %rhs4
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%val4 = select i1 %tst4, i64 %lhs64, i64 %inc4
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store volatile i64 %val4, i64* @var64
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; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
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; CHECK: csneg {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
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ret void
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; CHECK: ret
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}
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define void @test_cset(i32 %lhs, i32 %rhs, i64 %lhs64) {
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; CHECK-LABEL: test_cset:
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; N.b. code is not optimal here (32-bit csinc would be better) but
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; incoming DAG is too complex
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%tst1 = icmp eq i32 %lhs, %rhs
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%val1 = zext i1 %tst1 to i32
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store i32 %val1, i32* @var32
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; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}}
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; CHECK: cset {{w[0-9]+}}, eq
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%rhs64 = sext i32 %rhs to i64
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%tst2 = icmp ule i64 %lhs64, %rhs64
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%val2 = zext i1 %tst2 to i64
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store i64 %val2, i64* @var64
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; CHECK: cset {{w[0-9]+}}, ls
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ret void
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; CHECK: ret
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}
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define void @test_csetm(i32 %lhs, i32 %rhs, i64 %lhs64) {
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; CHECK-LABEL: test_csetm:
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%tst1 = icmp eq i32 %lhs, %rhs
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%val1 = sext i1 %tst1 to i32
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store i32 %val1, i32* @var32
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; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}}
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; CHECK: csetm {{w[0-9]+}}, eq
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%rhs64 = sext i32 %rhs to i64
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%tst2 = icmp ule i64 %lhs64, %rhs64
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%val2 = sext i1 %tst2 to i64
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store i64 %val2, i64* @var64
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; CHECK: csetm {{x[0-9]+}}, ls
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ret void
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; CHECK: ret
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}
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define <1 x i1> @test_wide_comparison(i32 %in) {
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; CHECK-LABEL: test_wide_comparison:
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; CHECK: cmp w0, #1234
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; CHECK: cset
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%tmp = icmp sgt i32 %in, 1234
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%res = select i1 %tmp, <1 x i1> <i1 1>, <1 x i1> zeroinitializer
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ret <1 x i1> %res
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}
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define i32 @test_select_undef() {
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; CHECK-LABEL: test_select_undef:
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; CHECK: ret
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%res = select i1 undef, i32 0, i32 42
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ret i32 %res
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}
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