forked from OSchip/llvm-project
26 lines
841 B
LLVM
26 lines
841 B
LLVM
; RUN: llc -mtriple aarch64--none-eabi -mattr=+bti < %s | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-arm-none-eabi"
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; When BTI is enabled, all indirect tail-calls must use x16 or x17 (the intra
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; procedure call scratch registers) to hold the address, as these instructions
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; are allowed to target the "BTI c" instruction at the start of the target
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; function. The alternative to this would be to start functions with "BTI jc",
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; which increases the number of potential ways they could be called, and
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; weakens the security protections.
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define void @bti_disabled(void ()* %p) {
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entry:
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tail call void %p()
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; CHECK: br x0
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ret void
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}
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define void @bti_enabled(void ()* %p) "branch-target-enforcement" {
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entry:
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tail call void %p()
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; CHECK: br {{x16|x17}}
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ret void
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}
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