forked from OSchip/llvm-project
118 lines
3.2 KiB
TableGen
118 lines
3.2 KiB
TableGen
//===-- Nios2InstrFormats.td - Nios2 Instruction Formats ---*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Describe NIOS2 instructions format
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//
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//
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//===----------------------------------------------------------------------===//
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// Format specifies the encoding used by the instruction. This is part of the
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// ad-hoc solution used to emit machine instruction encodings by our machine
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// code emitter.
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class Format<bits<3> val> {
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bits<3> Value = val;
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}
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def Pseudo : Format<0>;
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def FrmI : Format<1>;
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def FrmR : Format<2>;
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def FrmJ : Format<3>;
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def FrmOther : Format<4>; // Instruction w/ a custom format
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// Generic Nios2 Format
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class Nios2Inst<dag outs, dag ins, string asmstr, list<dag> pattern, Format f>
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: Instruction {
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field bits<32> Inst;
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Format Form = f;
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let Namespace = "Nios2";
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let Size = 4;
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bits<6> Opcode = 0;
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// Bottom 6 bits are the 'opcode' field
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let Inst{5 - 0} = Opcode;
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let OutOperandList = outs;
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let InOperandList = ins;
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let AsmString = asmstr;
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let Pattern = pattern;
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//
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// Attributes specific to Nios2 instructions:
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//
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bits<3> FormBits = Form.Value;
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// TSFlags layout should be kept in sync with Nios2InstrInfo.h.
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let TSFlags{2 - 0} = FormBits;
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let DecoderNamespace = "Nios2";
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}
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// Nios2 Instruction Format
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class InstSE<dag outs, dag ins, string asmstr, list<dag> pattern, Format f>
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: Nios2Inst<outs, ins, asmstr, pattern, f> {
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}
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//===----------------------------------------------------------------------===//
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// Format I instruction class in Nios2 : <|A|B|immediate|opcode|>
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//===----------------------------------------------------------------------===//
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class FI<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstSE<outs, ins, asmstr, pattern, FrmI> {
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bits<5> rA;
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bits<5> rB;
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bits<16> imm;
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let Opcode = op;
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let Inst{31 - 27} = rA;
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let Inst{26 - 22} = rB;
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let Inst{21 - 6} = imm;
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}
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//===----------------------------------------------------------------------===//
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// Format R instruction : <|A|B|C|opx|imm|opcode|>
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//===----------------------------------------------------------------------===//
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class FR<bits<6> opx, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstSE<outs, ins, asmstr, pattern, FrmR> {
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bits<5> rA;
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bits<5> rB;
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bits<5> rC;
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bits<5> imm = 0;
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// opcode is always 0x3a for R instr.
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let Opcode = 0x3a;
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let Inst{31 - 27} = rA;
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let Inst{26 - 22} = rB;
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let Inst{21 - 17} = rC;
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// opx stands for opcode extension
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let Inst{16 - 11} = opx;
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// optional 5-bit immediate value
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let Inst{10 - 6} = imm;
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}
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//===----------------------------------------------------------------------===//
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// Format J instruction class in Nios2 : <|address|opcode|>
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//===----------------------------------------------------------------------===//
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class FJ<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstSE<outs, ins, asmstr, pattern, FrmJ> {
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bits<26> addr;
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let Opcode = op;
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let Inst{31 - 6} = addr;
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}
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