forked from OSchip/llvm-project
129 lines
3.0 KiB
YAML
129 lines
3.0 KiB
YAML
# RUN: llc -march=amdgcn -run-pass=si-fix-sgpr-copies -verify-machineinstrs -o - %s | FileCheck --check-prefix=GCN %s
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# GCN-LABEL: name: fix-sgpr-copies
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# GCN: V_ADD_CO_U32_e32
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# GCN: V_ADDC_U32_e32
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---
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name: fix-sgpr-copies
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body: |
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bb.0:
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%0:vgpr_32 = IMPLICIT_DEF
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%1:sreg_32 = IMPLICIT_DEF
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%2:sreg_32 = IMPLICIT_DEF
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%3:sreg_32 = IMPLICIT_DEF
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%4:vgpr_32 = V_CVT_U32_F32_e64 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
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%5:sreg_32 = COPY %4:vgpr_32
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%6:sreg_32 = S_ADD_I32 %2:sreg_32, %5:sreg_32, implicit-def $scc
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%7:sreg_32 = S_ADDC_U32 %3:sreg_32, %1:sreg_32, implicit-def $scc, implicit $scc
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...
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# Test to ensure i1 phi copies from scalar registers through another phi won't
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# be promoted into vector ones.
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# GCN-LABEL: name: fix-sgpr-i1-phi-copies
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# GCN: .8:
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# GCN-NOT: vreg_64 = PHI
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---
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name: fix-sgpr-i1-phi-copies
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tracksRegLiveness: true
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body: |
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bb.9:
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S_BRANCH %bb.0
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bb.4:
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S_CBRANCH_SCC1 %bb.6, implicit undef $scc
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bb.5:
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%3:vreg_1 = IMPLICIT_DEF
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bb.6:
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%4:vreg_1 = PHI %2:sreg_64, %bb.4, %3:vreg_1, %bb.5
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bb.7:
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%5:vreg_1 = PHI %2:sreg_64, %bb.3, %4:vreg_1, %bb.6
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S_BRANCH %bb.8
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bb.0:
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S_CBRANCH_SCC1 %bb.2, implicit undef $scc
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bb.1:
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%0:sreg_64 = S_MOV_B64 0
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S_BRANCH %bb.3
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bb.2:
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%1:sreg_64 = S_MOV_B64 -1
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S_BRANCH %bb.3
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bb.3:
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%2:sreg_64 = PHI %0:sreg_64, %bb.1, %1:sreg_64, %bb.2
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S_CBRANCH_SCC1 %bb.7, implicit undef $scc
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S_BRANCH %bb.4
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bb.8:
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...
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# Avoid infinite loop in SIInstrInfo::legalizeGenericOperand when checking for ImpDef.
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# GCN-LABEL: name: legalize-operand-search-each-def-once
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# GCN-NOT: sreg_64 PHI
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---
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name: legalize-operand-search-each-def-once
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tracksRegLiveness: true
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body: |
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bb.0:
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successors: %bb.1, %bb.2
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liveins: $sgpr0_sgpr1
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%0:sgpr_64 = COPY $sgpr0_sgpr1
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S_CBRANCH_VCCZ %bb.2, implicit undef $vcc
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S_BRANCH %bb.1
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bb.1:
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%1:vreg_64 = IMPLICIT_DEF
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S_BRANCH %bb.2
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bb.2:
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%2:sgpr_64 = PHI %0, %bb.0, %1, %bb.1
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$sgpr0_sgpr1 = COPY %0
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...
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# A REG_SEQUENCE that uses registers defined by both a PHI and a COPY could
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# result in an endless search.
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# GCN-LABEL: name: process-phi-search-each-use-once
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# GCN-NOT: sreg_32 PHI
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---
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name: process-phi-search-each-use-once
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tracksRegLiveness: true
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body: |
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bb.0:
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successors: %bb.1, %bb.2
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liveins: $vgpr3
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%0:vgpr_32 = COPY $vgpr3
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S_CBRANCH_VCCZ %bb.2, implicit undef $vcc
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S_BRANCH %bb.1
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bb.1:
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%1:sgpr_32 = IMPLICIT_DEF
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S_BRANCH %bb.2
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bb.2:
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%2:sgpr_32 = PHI %0, %bb.0, %1, %bb.1
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%3:vreg_64 = REG_SEQUENCE %2, %subreg.sub0, %0, %subreg.sub1
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$vgpr3 = COPY %3.sub0
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...
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# Test to ensure that undef SCC gets properly propagated.
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# GCN-LABEL: name: scc_undef
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# GCN: S_CSELECT_B64 -1, 0, implicit undef $scc
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# GCN: V_CNDMASK
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---
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name: scc_undef
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tracksRegLiveness: true
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body: |
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bb.0:
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%1:vgpr_32 = IMPLICIT_DEF
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%2:sreg_32 = S_MOV_B32 1
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%3:sreg_32 = COPY %1:vgpr_32
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%4:sreg_32 = S_CSELECT_B32 killed %2:sreg_32, killed %3:sreg_32, implicit undef $scc
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---
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