llvm-project/llvm/lib/Target/AMDGPU
Matt Arsenault 124384f08d AMDGPU: Fix immediate folding logic when shrinking instructions
If the literal is being folded into src0, it doesn't matter
if it's an SGPR because it's being replaced with the literal.

Also fixes initially selecting 32-bit versions of some instructions
which also confused commuting.

llvm-svn: 281117
2016-09-09 23:32:53 +00:00
..
AsmParser AMDGPU] Assembler: better support for immediate literals in assembler. 2016-09-09 14:44:04 +00:00
Disassembler AMDGPU: Expand register indexing pseudos in custom inserter 2016-07-19 00:35:03 +00:00
InstPrinter AMDGPU] Assembler: better support for immediate literals in assembler. 2016-09-09 14:44:04 +00:00
MCTargetDesc AMDGPU] Assembler: better support for immediate literals in assembler. 2016-09-09 14:44:04 +00:00
TargetInfo Remove autoconf support 2016-01-26 21:29:08 +00:00
Utils AMDGPU] Assembler: better support for immediate literals in assembler. 2016-09-09 14:44:04 +00:00
AMDGPU.h AMDGPU: Split SILowerControlFlow into two pieces 2016-08-22 19:33:16 +00:00
AMDGPU.td [AMDGPU] Assembler: match e32 VOP instructions before e64. 2016-09-09 09:37:51 +00:00
AMDGPUAlwaysInlinePass.cpp AMDGPU/SI: Handle aliases in AMDGPUAlwaysInlinePass 2016-08-31 11:18:33 +00:00
AMDGPUAnnotateKernelFeatures.cpp AMDGPU: Prune includes 2016-08-11 19:18:50 +00:00
AMDGPUAnnotateUniformValues.cpp Add optimization bisect opt-in calls for AMDGPU passes 2016-04-25 22:23:44 +00:00
AMDGPUAsmPrinter.cpp AMDGPU: Remove a useless variable which caused build failure for lld. 2016-09-07 18:31:11 +00:00
AMDGPUAsmPrinter.h [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
AMDGPUCallLowering.cpp GlobalISel: implement simple function calls on AArch64. 2016-08-10 21:44:01 +00:00
AMDGPUCallLowering.h GlobalISel: implement simple function calls on AArch64. 2016-08-10 21:44:01 +00:00
AMDGPUCallingConv.td AMDGPU: Fix kernel argument alignment impacting stack size 2016-06-18 05:15:53 +00:00
AMDGPUCodeGenPrepare.cpp AMDGPU: Use rcp for fdiv 1, x with fpmath metadata 2016-07-26 23:25:44 +00:00
AMDGPUFrameLowering.cpp MachineFunction: Return reference for getFrameInfo(); NFC 2016-07-28 18:40:00 +00:00
AMDGPUFrameLowering.h AMDGPU: Move R600 only pieces into R600 classes 2016-07-09 18:11:15 +00:00
AMDGPUISelDAGToDAG.cpp AMDGPU: Run LoadStoreVectorizer pass by default 2016-09-09 22:29:28 +00:00
AMDGPUISelLowering.cpp AMDGPU/SI: Make sure llvm.amdgcn.implicitarg.ptr() is 8-byte aligned for HSA 2016-09-09 19:28:00 +00:00
AMDGPUISelLowering.h AMDGPU/R600: Remove MergeVectorStores from legalization 2016-08-29 22:05:06 +00:00
AMDGPUInstrInfo.cpp AMDGPU: Move R600 only pieces into R600 classes 2016-07-09 18:11:15 +00:00
AMDGPUInstrInfo.h AMDGPU/R600: Remove macros 2016-08-13 01:43:46 +00:00
AMDGPUInstrInfo.td AMDGPU: Select mulhi 24-bit instructions 2016-08-27 01:32:27 +00:00
AMDGPUInstructions.td AMDGPU] Assembler: better support for immediate literals in assembler. 2016-09-09 14:44:04 +00:00
AMDGPUIntrinsicInfo.cpp AMDGPU: Change fdiv lowering based on !fpmath metadata 2016-07-19 23:16:53 +00:00
AMDGPUIntrinsicInfo.h AMDGPU: Change fdiv lowering based on !fpmath metadata 2016-07-19 23:16:53 +00:00
AMDGPUIntrinsics.td AMDGPU: Remove read_workdim intrinsic 2016-07-25 20:17:02 +00:00
AMDGPUMCInstLower.cpp AMDGPU/SI: Add support for R_AMDGPU_GOTPCREL 2016-07-13 14:23:33 +00:00
AMDGPUMCInstLower.h AMDGPU: Remove empty file comment 2016-08-10 19:11:48 +00:00
AMDGPUMachineFunction.cpp AMDGPU: Make AMDGPUMachineFunction fields private 2016-07-26 16:45:58 +00:00
AMDGPUMachineFunction.h AMDGPU: Make AMDGPUMachineFunction fields private 2016-07-26 16:45:58 +00:00
AMDGPUOpenCLImageTypeLoweringPass.cpp [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
AMDGPUPromoteAlloca.cpp [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
AMDGPURegisterInfo.cpp AMDGPU: Move R600 only pieces into R600 classes 2016-07-09 18:11:15 +00:00
AMDGPURegisterInfo.h AMDGPU: Move R600 only pieces into R600 classes 2016-07-09 18:11:15 +00:00
AMDGPURegisterInfo.td
AMDGPURuntimeMetadata.h AMDGPU: Add hidden kernel arguments to runtime metadata 2016-09-07 17:44:00 +00:00
AMDGPUSubtarget.cpp [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
AMDGPUSubtarget.h AMDGPU/SI: Make sure llvm.amdgcn.implicitarg.ptr() is 8-byte aligned for HSA 2016-09-09 19:28:00 +00:00
AMDGPUTargetMachine.cpp AMDGPU: Run LoadStoreVectorizer pass by default 2016-09-09 22:29:28 +00:00
AMDGPUTargetMachine.h AMDGPU: Delete more dead code 2016-07-22 17:01:25 +00:00
AMDGPUTargetObjectFile.cpp Revert "[AMDGPU] Emit read-only data to .rodata for hsa" 2016-07-22 23:46:40 +00:00
AMDGPUTargetObjectFile.h AMDGPU/SI: Add support for AMD code object version 2. 2016-05-05 17:03:33 +00:00
AMDGPUTargetTransformInfo.cpp AMDGPU: Implement getLoadStoreVecRegBitWidth 2016-07-01 00:56:27 +00:00
AMDGPUTargetTransformInfo.h [TTI] The cost model should not assume vector casts get completely scalarized 2016-07-06 17:30:56 +00:00
AMDILCFGStructurizer.cpp CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses 2016-08-24 01:52:46 +00:00
AMDKernelCodeT.h [AMDGPU] fix amd_kernel_code_t bit field position as per spec (added missing reserved fields) 2016-02-24 10:54:25 +00:00
CIInstructions.td AMDGPU : Fix mqsad_u32_u8 instruction incorrect data type. 2016-09-09 19:31:51 +00:00
CMakeLists.txt AMDGPU/SI: Implement a custom MachineSchedStrategy 2016-08-29 19:42:52 +00:00
CaymanInstructions.td AMDGPU: Select mulhi 24-bit instructions 2016-08-27 01:32:27 +00:00
DSInstructions.td [AMDGPU] refactor DS instruction definitions. NFC. 2016-08-01 14:21:30 +00:00
EvergreenInstructions.td AMDGPU: Select mulhi 24-bit instructions 2016-08-27 01:32:27 +00:00
FLATInstructions.td [AMDGPU] Refactor FLAT TD instructions 2016-09-05 11:22:51 +00:00
GCNHazardRecognizer.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
GCNHazardRecognizer.h AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
GCNSchedStrategy.cpp [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
GCNSchedStrategy.h AMDGPU/SI: Implement a custom MachineSchedStrategy 2016-08-29 19:42:52 +00:00
LLVMBuild.txt AMDGPU: Prune AMDGPUAsmParser in libdeps. 2016-07-09 07:54:27 +00:00
MIMGInstructions.td AMDGPU/SI: MIMG TD Refactoring. 2016-09-01 17:54:54 +00:00
Processors.td AMDGPU : Add XNACK feature to GPUs that support it. 2016-09-06 19:55:17 +00:00
R600ClauseMergePass.cpp AMDGPU: Remove implicit iterator conversions, NFC 2016-07-08 19:16:05 +00:00
R600ControlFlowFinalizer.cpp AMDGPU: Avoid looking for the DebugLoc in end() 2016-08-17 00:06:43 +00:00
R600Defines.h AMDGPU: R600 code splitting cleanup 2016-03-11 08:00:27 +00:00
R600EmitClauseMarkers.cpp Fix more dereferenced end() iterators after r278532 2016-08-13 01:12:49 +00:00
R600ExpandSpecialInstrs.cpp AMDGPU: Delete more dead code 2016-07-22 17:01:25 +00:00
R600FrameLowering.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
R600FrameLowering.h AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
R600ISelLowering.cpp AMDGPU/R600: EXTRACT_VECT_ELT should only bypass BUILD_VECTOR if the vectors have the same number of elements. 2016-09-02 20:13:19 +00:00
R600ISelLowering.h AMDGPU: Fix i1 fp_to_int 2016-07-22 17:01:21 +00:00
R600InstrFormats.td AMDGPU/R600: Convert buffer id to VTX_READ input 2016-08-15 21:38:30 +00:00
R600InstrInfo.cpp AMDGPU/R600: Remove macros 2016-08-13 01:43:46 +00:00
R600InstrInfo.h [AMDGPU] Give enum an explicit 64-bit type to fix MSVC 2013 failures 2016-08-15 23:54:44 +00:00
R600Instructions.td AMDGPU: Select mulhi 24-bit instructions 2016-08-27 01:32:27 +00:00
R600Intrinsics.td AMDGPU: Fix TargetPrefix for remaining r600 intrinsics 2016-07-15 21:27:08 +00:00
R600MachineFunctionInfo.cpp AMDGPU: Delete more dead code 2016-07-22 17:01:25 +00:00
R600MachineFunctionInfo.h AMDGPU: Delete more dead code 2016-07-22 17:01:25 +00:00
R600MachineScheduler.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
R600MachineScheduler.h AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
R600OptimizeVectorRegisters.cpp Use the range variant of find instead of unpacking begin/end 2016-08-11 22:21:41 +00:00
R600Packetizer.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
R600RegisterInfo.cpp AMDGPU: Move R600 only pieces into R600 classes 2016-07-09 18:11:15 +00:00
R600RegisterInfo.h AMDGPU: Move R600 only pieces into R600 classes 2016-07-09 18:11:15 +00:00
R600RegisterInfo.td
R600Schedule.td AMDGPU: Fix trailing whitespace 2016-06-10 02:18:02 +00:00
R700Instructions.td
SIAnnotateControlFlow.cpp Use the range variant of find instead of unpacking begin/end 2016-08-11 22:21:41 +00:00
SIDebuggerInsertNops.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
SIDefines.h AMDGPU] Assembler: better support for immediate literals in assembler. 2016-09-09 14:44:04 +00:00
SIFixControlFlowLiveIntervals.cpp Revert "AMDGPU: Remove unused control flow intrinsic" 2016-07-09 17:18:39 +00:00
SIFixSGPRCopies.cpp Revert "AMDGPU: Remove unused control flow intrinsic" 2016-07-09 17:18:39 +00:00
SIFoldOperands.cpp AMDGPU: Don't fold subregister extracts into tied operands 2016-08-15 16:18:36 +00:00
SIFrameLowering.cpp [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
SIFrameLowering.h AMDGPU: Refactor frame lowering 2016-08-31 21:52:21 +00:00
SIISelLowering.cpp AMDGPU: Relax SGPR asm constraint register class 2016-08-30 20:50:08 +00:00
SIISelLowering.h AMDGPU: Remove analyzeImmediate 2016-07-28 00:32:02 +00:00
SIInsertSkips.cpp AMDGPU: Split SILowerControlFlow into two pieces 2016-08-22 19:33:16 +00:00
SIInsertWaits.cpp AMDGPU: Remove implicit iterator conversions, NFC 2016-07-08 19:16:05 +00:00
SIInstrFormats.td [AMDGPU] Assembler: match e32 VOP instructions before e64. 2016-09-09 09:37:51 +00:00
SIInstrInfo.cpp AMDGPU: Fix immediate folding logic when shrinking instructions 2016-09-09 23:32:53 +00:00
SIInstrInfo.h AMDGPU: Support commuting with immediate in src0 2016-09-08 17:19:29 +00:00
SIInstrInfo.td AMDGPU : Fix mqsad_u32_u8 instruction incorrect data type. 2016-09-09 19:31:51 +00:00
SIInstructions.td AMDGPU: Fix immediate folding logic when shrinking instructions 2016-09-09 23:32:53 +00:00
SIIntrinsics.td AMDGPU: Change fdiv lowering based on !fpmath metadata 2016-07-19 23:16:53 +00:00
SILoadStoreOptimizer.cpp SILoadStoreOptimizer.cpp: Fix a warning in r279991. [-Wunused-variable] 2016-08-30 11:50:21 +00:00
SILowerControlFlow.cpp AMDGPU: Remove register operand from si_mask_branch 2016-08-27 00:42:21 +00:00
SILowerI1Copies.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
SIMachineFunctionInfo.cpp [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
SIMachineFunctionInfo.h [AMDGPU] Wave and register controls 2016-09-06 20:22:28 +00:00
SIMachineScheduler.cpp AMDGPU/SI: Use a better method for determining the largest pressure sets 2016-08-26 21:16:37 +00:00
SIMachineScheduler.h AMDGPU: R600 code splitting cleanup 2016-03-11 08:00:27 +00:00
SIRegisterInfo.cpp AMDGPU] Assembler: better support for immediate literals in assembler. 2016-09-09 14:44:04 +00:00
SIRegisterInfo.h Remove unnecessary call to getAllocatableRegClass 2016-09-07 06:16:45 +00:00
SIRegisterInfo.td AMDGPU : Fix mqsad_u32_u8 instruction incorrect data type. 2016-09-09 19:31:51 +00:00
SISchedule.td AMDGPU/SI: Implement a custom MachineSchedStrategy 2016-08-29 19:42:52 +00:00
SIShrinkInstructions.cpp AMDGPU: Fix immediate folding logic when shrinking instructions 2016-09-09 23:32:53 +00:00
SITypeRewriter.cpp AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
SIWholeQuadMode.cpp AMDGPU: Reduce the duration of whole-quad-mode 2016-09-03 12:26:38 +00:00
SMInstructions.td [AMDGPU] Scalar Memory instructions TD refactoring 2016-09-01 09:56:47 +00:00
SOPInstructions.td AMDGPU] Assembler: better support for immediate literals in assembler. 2016-09-09 14:44:04 +00:00
VIInstrFormats.td [AMDGPU] Assembler: match e32 VOP instructions before e64. 2016-09-09 09:37:51 +00:00
VIInstructions.td AMDGPU] Assembler: better support for immediate literals in assembler. 2016-09-09 14:44:04 +00:00