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llvm-project/llvm/test/CodeGen/Mips/micromips-sizereduction
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Zoran Jovanovic 3a7654c15d [mips][microMIPS] Extending size reduction pass with LWP and SWP 
Author: milena.vujosevic.janicic
Reviewers: sdardis
The patch extends size reduction pass for MicroMIPS.
It introduces reduction of two instructions into one instruction:
Two SW instructions are transformed into one SWP instrucition.
Two LW instructions are transformed into one LWP instrucition.
Differential Revision: https://reviews.llvm.org/D39115

llvm-svn: 334595
 		2018-06-13 12:51:37 +00:00
..
micromips-addiur1sp-addiusp.ll [mips][microMIPS] Extending size reduction pass with ADDIUSP and ADDIUR1SP 2017-08-04 10:18:44 +00:00
micromips-lbu16-lhu16-sb16-sh16.ll
…
micromips-lwp-swp.ll [mips][microMIPS] Extending size reduction pass with LWP and SWP 2018-06-13 12:51:37 +00:00
micromips-lwp-swp.mir [mips][microMIPS] Extending size reduction pass with LWP and SWP 2018-06-13 12:51:37 +00:00
micromips-lwsp-swsp.ll
…
micromips-no-lwp-swp.mir [mips][microMIPS] Extending size reduction pass with LWP and SWP 2018-06-13 12:51:37 +00:00
micromips-xor16.ll [mips][microMIPS] Extending size reduction pass with XOR16 2017-08-10 10:27:29 +00:00