forked from OSchip/llvm-project
326 lines
12 KiB
LLVM
326 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; Except for the NACL version which isn't parsed by update_llc_test_checks.py
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; RUN: llc -mtriple=mipsel-unknown-linux-gnu -O3 -relocation-model=pic < %s \
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; RUN: | FileCheck %s -check-prefix=NOLONGBRANCH
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; RUN: llc -mtriple=mipsel-unknown-linux-gnu -force-mips-long-branch -O3 -relocation-model=pic < %s \
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; RUN: | FileCheck %s -check-prefix=O32-PIC
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; RUN: llc -mtriple=mipsel-unknown-linux-gnu -force-mips-long-branch -O3 -relocation-model=static < %s \
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; RUN: | FileCheck %s -check-prefix=O32-STATIC
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; RUN: llc -mtriple=mipsel-unknown-linux-gnu -mcpu=mips32r6 -force-mips-long-branch -O3 \
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; RUN: -relocation-model=pic < %s | FileCheck %s -check-prefix=O32-R6-PIC
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; RUN: llc -mtriple=mips64el-unknown-linux-gnu -mcpu=mips4 -target-abi=n64 -force-mips-long-branch -O3 -relocation-model=pic \
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; RUN: < %s | FileCheck %s -check-prefix=MIPS4
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; RUN: llc -mtriple=mips64el-unknown-linux-gnu -mcpu=mips64 -target-abi=n64 -force-mips-long-branch -O3 -relocation-model=pic \
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; RUN: < %s | FileCheck %s -check-prefix=MIPS64
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; RUN: llc -mtriple=mips64el-unknown-linux-gnu -mcpu=mips64r6 -target-abi=n64 -force-mips-long-branch -O3 \
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; RUN: -relocation-model=pic < %s | FileCheck %s -check-prefix=N64-R6
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; RUN: llc -mtriple=mipsel-unknown-linux-gnu -mcpu=mips32r2 -mattr=micromips \
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; RUN: -force-mips-long-branch -O3 -relocation-model=pic < %s | FileCheck %s -check-prefix=MICROMIPS
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; RUN: llc -mtriple=mipsel-unknown-linux-gnu -mcpu=mips32r2 -mattr=micromips \
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; RUN: -force-mips-long-branch -O3 -relocation-model=static < %s | FileCheck %s -check-prefix=MICROMIPSSTATIC
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; RUN: llc -mtriple=mipsel-unknown-linux-gnu -mcpu=mips32r6 -mattr=micromips \
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; RUN: -force-mips-long-branch -O3 -relocation-model=static < %s | FileCheck %s -check-prefix=MICROMIPSR6STATIC
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; RUN: llc -mtriple=mipsel-unknown-linux-gnu -mcpu=mips32r6 -mattr=micromips \
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; RUN: -force-mips-long-branch -O3 -relocation-model=pic < %s | FileCheck %s -check-prefix=MICROMIPSR6PIC
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; RUN: llc -mtriple=mipsel-none-nacl -force-mips-long-branch -O3 -relocation-model=pic < %s \
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; RUN: | FileCheck %s -check-prefix=NACL
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@x = external global i32
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define void @test1(i32 signext %s) {
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; NOLONGBRANCH-LABEL: test1:
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; NOLONGBRANCH: # %bb.0: # %entry
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; NOLONGBRANCH-NEXT: lui $2, %hi(_gp_disp)
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; NOLONGBRANCH-NEXT: addiu $2, $2, %lo(_gp_disp)
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; NOLONGBRANCH-NEXT: beqz $4, $BB0_2
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; NOLONGBRANCH-NEXT: addu $2, $2, $25
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; NOLONGBRANCH-NEXT: # %bb.1: # %then
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; NOLONGBRANCH-NEXT: lw $1, %got(x)($2)
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; NOLONGBRANCH-NEXT: addiu $2, $zero, 1
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; NOLONGBRANCH-NEXT: sw $2, 0($1)
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; NOLONGBRANCH-NEXT: $BB0_2: # %end
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; NOLONGBRANCH-NEXT: jr $ra
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; NOLONGBRANCH-NEXT: nop
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;
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; O32-PIC-LABEL: test1:
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; O32-PIC: # %bb.0: # %entry
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; O32-PIC-NEXT: lui $2, %hi(_gp_disp)
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; O32-PIC-NEXT: addiu $2, $2, %lo(_gp_disp)
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; O32-PIC-NEXT: bnez $4, $BB0_3
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; O32-PIC-NEXT: addu $2, $2, $25
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; O32-PIC-NEXT: # %bb.1: # %entry
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; O32-PIC-NEXT: addiu $sp, $sp, -8
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; O32-PIC-NEXT: sw $ra, 0($sp)
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; O32-PIC-NEXT: lui $1, %hi(($BB0_4)-($BB0_2))
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; O32-PIC-NEXT: bal $BB0_2
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; O32-PIC-NEXT: addiu $1, $1, %lo(($BB0_4)-($BB0_2))
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; O32-PIC-NEXT: $BB0_2: # %entry
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; O32-PIC-NEXT: addu $1, $ra, $1
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; O32-PIC-NEXT: lw $ra, 0($sp)
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; O32-PIC-NEXT: jr $1
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; O32-PIC-NEXT: addiu $sp, $sp, 8
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; O32-PIC-NEXT: $BB0_3: # %then
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; O32-PIC-NEXT: lw $1, %got(x)($2)
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; O32-PIC-NEXT: addiu $2, $zero, 1
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; O32-PIC-NEXT: sw $2, 0($1)
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; O32-PIC-NEXT: $BB0_4: # %end
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; O32-PIC-NEXT: jr $ra
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; O32-PIC-NEXT: nop
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;
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; O32-STATIC-LABEL: test1:
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; O32-STATIC: # %bb.0: # %entry
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; O32-STATIC-NEXT: bnez $4, $BB0_2
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; O32-STATIC-NEXT: nop
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; O32-STATIC-NEXT: # %bb.1: # %entry
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; O32-STATIC-NEXT: j $BB0_3
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; O32-STATIC-NEXT: nop
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; O32-STATIC-NEXT: $BB0_2: # %then
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; O32-STATIC-NEXT: lui $1, %hi(x)
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; O32-STATIC-NEXT: addiu $2, $zero, 1
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; O32-STATIC-NEXT: sw $2, %lo(x)($1)
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; O32-STATIC-NEXT: $BB0_3: # %end
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; O32-STATIC-NEXT: jr $ra
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; O32-STATIC-NEXT: nop
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;
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; O32-R6-PIC-LABEL: test1:
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; O32-R6-PIC: # %bb.0: # %entry
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; O32-R6-PIC-NEXT: lui $2, %hi(_gp_disp)
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; O32-R6-PIC-NEXT: addiu $2, $2, %lo(_gp_disp)
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; O32-R6-PIC-NEXT: bnez $4, $BB0_3
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; O32-R6-PIC-NEXT: addu $2, $2, $25
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; O32-R6-PIC-NEXT: # %bb.1: # %entry
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; O32-R6-PIC-NEXT: addiu $sp, $sp, -8
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; O32-R6-PIC-NEXT: sw $ra, 0($sp)
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; O32-R6-PIC-NEXT: lui $1, %hi(($BB0_4)-($BB0_2))
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; O32-R6-PIC-NEXT: addiu $1, $1, %lo(($BB0_4)-($BB0_2))
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; O32-R6-PIC-NEXT: balc $BB0_2
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; O32-R6-PIC-NEXT: $BB0_2: # %entry
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; O32-R6-PIC-NEXT: addu $1, $ra, $1
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; O32-R6-PIC-NEXT: lw $ra, 0($sp)
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; O32-R6-PIC-NEXT: addiu $sp, $sp, 8
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; O32-R6-PIC-NEXT: jrc $1
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; O32-R6-PIC-NEXT: $BB0_3: # %then
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; O32-R6-PIC-NEXT: lw $1, %got(x)($2)
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; O32-R6-PIC-NEXT: addiu $2, $zero, 1
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; O32-R6-PIC-NEXT: sw $2, 0($1)
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; O32-R6-PIC-NEXT: $BB0_4: # %end
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; O32-R6-PIC-NEXT: jrc $ra
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;
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; O32-R6-STATIC-LABEL: test1:
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; O32-R6-STATIC: # %bb.0: # %entry
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; O32-R6-STATIC-NEXT: bnezc $4, $BB0_2
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; O32-R6-STATIC-NEXT: nop
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; O32-R6-STATIC-NEXT: # %bb.1: # %entry
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; O32-R6-STATIC-NEXT: bc $BB0_3
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; O32-R6-STATIC-NEXT: $BB0_2: # %then
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; O32-R6-STATIC-NEXT: lui $1, %hi(x)
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; O32-R6-STATIC-NEXT: addiu $2, $zero, 1
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; O32-R6-STATIC-NEXT: sw $2, %lo(x)($1)
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; O32-R6-STATIC-NEXT: $BB0_3: # %end
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; O32-R6-STATIC-NEXT: jrc $ra
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;
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; MIPS4-LABEL: test1:
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; MIPS4: # %bb.0: # %entry
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; MIPS4-NEXT: lui $1, %hi(%neg(%gp_rel(test1)))
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; MIPS4-NEXT: bnez $4, .LBB0_3
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; MIPS4-NEXT: daddu $2, $1, $25
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; MIPS4-NEXT: # %bb.1: # %entry
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; MIPS4-NEXT: daddiu $sp, $sp, -16
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; MIPS4-NEXT: sd $ra, 0($sp)
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; MIPS4-NEXT: daddiu $1, $zero, %hi(.LBB0_4-.LBB0_2)
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; MIPS4-NEXT: dsll $1, $1, 16
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; MIPS4-NEXT: bal .LBB0_2
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; MIPS4-NEXT: daddiu $1, $1, %lo(.LBB0_4-.LBB0_2)
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; MIPS4-NEXT: .LBB0_2: # %entry
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; MIPS4-NEXT: daddu $1, $ra, $1
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; MIPS4-NEXT: ld $ra, 0($sp)
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; MIPS4-NEXT: jr $1
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; MIPS4-NEXT: daddiu $sp, $sp, 16
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; MIPS4-NEXT: .LBB0_3: # %then
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; MIPS4-NEXT: daddiu $1, $2, %lo(%neg(%gp_rel(test1)))
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; MIPS4-NEXT: addiu $2, $zero, 1
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; MIPS4-NEXT: ld $1, %got_disp(x)($1)
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; MIPS4-NEXT: sw $2, 0($1)
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; MIPS4-NEXT: .LBB0_4: # %end
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; MIPS4-NEXT: jr $ra
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; MIPS4-NEXT: nop
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;
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; MIPS64-LABEL: test1:
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; MIPS64: # %bb.0: # %entry
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; MIPS64-NEXT: lui $1, %hi(%neg(%gp_rel(test1)))
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; MIPS64-NEXT: bnez $4, .LBB0_3
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; MIPS64-NEXT: daddu $2, $1, $25
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; MIPS64-NEXT: # %bb.1: # %entry
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; MIPS64-NEXT: daddiu $sp, $sp, -16
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; MIPS64-NEXT: sd $ra, 0($sp)
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; MIPS64-NEXT: daddiu $1, $zero, %hi(.LBB0_4-.LBB0_2)
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; MIPS64-NEXT: dsll $1, $1, 16
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; MIPS64-NEXT: bal .LBB0_2
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; MIPS64-NEXT: daddiu $1, $1, %lo(.LBB0_4-.LBB0_2)
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; MIPS64-NEXT: .LBB0_2: # %entry
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; MIPS64-NEXT: daddu $1, $ra, $1
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; MIPS64-NEXT: ld $ra, 0($sp)
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; MIPS64-NEXT: jr $1
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; MIPS64-NEXT: daddiu $sp, $sp, 16
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; MIPS64-NEXT: .LBB0_3: # %then
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; MIPS64-NEXT: daddiu $1, $2, %lo(%neg(%gp_rel(test1)))
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; MIPS64-NEXT: addiu $2, $zero, 1
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; MIPS64-NEXT: ld $1, %got_disp(x)($1)
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; MIPS64-NEXT: sw $2, 0($1)
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; MIPS64-NEXT: .LBB0_4: # %end
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; MIPS64-NEXT: jr $ra
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; MIPS64-NEXT: nop
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;
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; N64-R6-LABEL: test1:
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; N64-R6: # %bb.0: # %entry
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; N64-R6-NEXT: lui $1, %hi(%neg(%gp_rel(test1)))
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; N64-R6-NEXT: bnez $4, .LBB0_3
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; N64-R6-NEXT: daddu $2, $1, $25
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; N64-R6-NEXT: # %bb.1: # %entry
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; N64-R6-NEXT: daddiu $sp, $sp, -16
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; N64-R6-NEXT: sd $ra, 0($sp)
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; N64-R6-NEXT: daddiu $1, $zero, %hi(.LBB0_4-.LBB0_2)
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; N64-R6-NEXT: dsll $1, $1, 16
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; N64-R6-NEXT: daddiu $1, $1, %lo(.LBB0_4-.LBB0_2)
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; N64-R6-NEXT: balc .LBB0_2
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; N64-R6-NEXT: .LBB0_2: # %entry
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; N64-R6-NEXT: daddu $1, $ra, $1
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; N64-R6-NEXT: ld $ra, 0($sp)
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; N64-R6-NEXT: daddiu $sp, $sp, 16
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; N64-R6-NEXT: jrc $1
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; N64-R6-NEXT: .LBB0_3: # %then
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; N64-R6-NEXT: daddiu $1, $2, %lo(%neg(%gp_rel(test1)))
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; N64-R6-NEXT: addiu $2, $zero, 1
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; N64-R6-NEXT: ld $1, %got_disp(x)($1)
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; N64-R6-NEXT: sw $2, 0($1)
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; N64-R6-NEXT: .LBB0_4: # %end
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; N64-R6-NEXT: jrc $ra
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;
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; MICROMIPS-LABEL: test1:
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; MICROMIPS: # %bb.0: # %entry
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; MICROMIPS-NEXT: lui $2, %hi(_gp_disp)
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; MICROMIPS-NEXT: addiu $2, $2, %lo(_gp_disp)
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; MICROMIPS-NEXT: bnez $4, $BB0_3
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; MICROMIPS-NEXT: addu $2, $2, $25
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; MICROMIPS-NEXT: # %bb.1: # %entry
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; MICROMIPS-NEXT: addiu $sp, $sp, -8
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; MICROMIPS-NEXT: sw $ra, 0($sp)
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; MICROMIPS-NEXT: lui $1, %hi(($BB0_4)-($BB0_2))
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; MICROMIPS-NEXT: bal $BB0_2
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; MICROMIPS-NEXT: addiu $1, $1, %lo(($BB0_4)-($BB0_2))
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; MICROMIPS-NEXT: $BB0_2: # %entry
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; MICROMIPS-NEXT: addu $1, $ra, $1
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; MICROMIPS-NEXT: lw $ra, 0($sp)
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; MICROMIPS-NEXT: jr $1
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; MICROMIPS-NEXT: addiu $sp, $sp, 8
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; MICROMIPS-NEXT: $BB0_3: # %then
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; MICROMIPS-NEXT: lw $2, %got(x)($2)
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; MICROMIPS-NEXT: li16 $3, 1
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; MICROMIPS-NEXT: sw16 $3, 0($2)
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; MICROMIPS-NEXT: $BB0_4: # %end
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; MICROMIPS-NEXT: jrc $ra
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;
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; MICROMIPSSTATIC-LABEL: test1:
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; MICROMIPSSTATIC: # %bb.0: # %entry
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; MICROMIPSSTATIC-NEXT: bnezc $4, $BB0_2
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; MICROMIPSSTATIC-NEXT: # %bb.1: # %entry
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; MICROMIPSSTATIC-NEXT: j $BB0_4
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; MICROMIPSSTATIC-NEXT: nop
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; MICROMIPSSTATIC-NEXT: $BB0_2: # %entry
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; MICROMIPSSTATIC-NEXT: j $BB0_3
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; MICROMIPSSTATIC-NEXT: nop
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; MICROMIPSSTATIC-NEXT: $BB0_3: # %then
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; MICROMIPSSTATIC-NEXT: lui $1, %hi(x)
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; MICROMIPSSTATIC-NEXT: li16 $2, 1
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; MICROMIPSSTATIC-NEXT: sw $2, %lo(x)($1)
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; MICROMIPSSTATIC-NEXT: $BB0_4: # %end
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; MICROMIPSSTATIC-NEXT: jrc $ra
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;
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; MICROMIPSR6STATIC-LABEL: test1:
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; MICROMIPSR6STATIC: # %bb.0: # %entry
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; MICROMIPSR6STATIC-NEXT: bnezc $4, $BB0_2
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; MICROMIPSR6STATIC-NEXT: # %bb.1: # %entry
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; MICROMIPSR6STATIC-NEXT: bc $BB0_3
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; MICROMIPSR6STATIC-NEXT: $BB0_2: # %then
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; MICROMIPSR6STATIC-NEXT: lui $1, %hi(x)
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; MICROMIPSR6STATIC-NEXT: li16 $2, 1
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; MICROMIPSR6STATIC-NEXT: sw $2, %lo(x)($1)
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; MICROMIPSR6STATIC-NEXT: $BB0_3: # %end
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; MICROMIPSR6STATIC-NEXT: jrc $ra
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;
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; MICROMIPSR6PIC-LABEL: test1:
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; MICROMIPSR6PIC: # %bb.0: # %entry
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; MICROMIPSR6PIC-NEXT: lui $2, %hi(_gp_disp)
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; MICROMIPSR6PIC-NEXT: addiu $2, $2, %lo(_gp_disp)
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; MICROMIPSR6PIC-NEXT: addu $2, $2, $25
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; MICROMIPSR6PIC-NEXT: bnezc $4, $BB0_3
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; MICROMIPSR6PIC-NEXT: # %bb.1: # %entry
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; MICROMIPSR6PIC-NEXT: addiu $sp, $sp, -8
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; MICROMIPSR6PIC-NEXT: sw $ra, 0($sp)
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; MICROMIPSR6PIC-NEXT: lui $1, %hi(($BB0_4)-($BB0_2))
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; MICROMIPSR6PIC-NEXT: addiu $1, $1, %lo(($BB0_4)-($BB0_2))
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; MICROMIPSR6PIC-NEXT: balc $BB0_2
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; MICROMIPSR6PIC-NEXT: $BB0_2: # %entry
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; MICROMIPSR6PIC-NEXT: addu $1, $ra, $1
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; MICROMIPSR6PIC-NEXT: lw $ra, 0($sp)
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; MICROMIPSR6PIC-NEXT: addiu $sp, $sp, 8
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; MICROMIPSR6PIC-NEXT: jic $1, 0
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; MICROMIPSR6PIC-NEXT: $BB0_3: # %then
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; MICROMIPSR6PIC-NEXT: lw $2, %got(x)($2)
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; MICROMIPSR6PIC-NEXT: li16 $3, 1
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; MICROMIPSR6PIC-NEXT: sw16 $3, 0($2)
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; MICROMIPSR6PIC-NEXT: $BB0_4: # %end
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; MICROMIPSR6PIC-NEXT: jrc $ra
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; NACL-LABEL: test1:
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; NACL: # %bb.0:
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; NACL-NEXT: lui $2, %hi(_gp_disp)
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; NACL-NEXT: addiu $2, $2, %lo(_gp_disp)
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; NACL-NEXT: bnez $4, $BB0_3
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; NACL-NEXT: addu $2, $2, $25
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; NACL-NEXT: # %bb.1:
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; NACL-NEXT: addiu $sp, $sp, -8
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; NACL-NEXT: sw $ra, 0($sp)
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; NACL-NEXT: lui $1, %hi(($BB0_4)-($BB0_2))
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; NACL-NEXT: bal $BB0_2
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; NACL-NEXT: addiu $1, $1, %lo(($BB0_4)-($BB0_2))
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; NACL-NEXT: $BB0_2:
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; NACL-NEXT: addu $1, $ra, $1
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; NACL-NEXT: lw $ra, 0($sp)
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; NACL-NEXT: addiu $sp, $sp, 8
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; NACL-NEXT: jr $1
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; NACL-NEXT: nop
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; NACL-NEXT: $BB0_3:
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; NACL-NEXT: lw $1, %got(x)($2)
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; NACL-NEXT: addiu $2, $zero, 1
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; NACL-NEXT: sw $2, 0($1)
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; NACL-NEXT: .p2align 4
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; NACL-NEXT: $BB0_4:
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; NACL-NEXT: jr $ra
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; NACL-NEXT: nop
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; Check the NaCl version. Check that sp change is not in the branch delay slot
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; of "jr $1" instruction. Check that target of indirect branch "jr $1" is
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; bundle aligned.
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entry:
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%cmp = icmp eq i32 %s, 0
|
|
br i1 %cmp, label %end, label %then
|
|
|
|
then:
|
|
store i32 1, i32* @x, align 4
|
|
br label %end
|
|
|
|
end:
|
|
ret void
|
|
|
|
}
|