forked from OSchip/llvm-project
51 lines
1.2 KiB
YAML
51 lines
1.2 KiB
YAML
# RUN: llc -march=hexagon -run-pass if-converter -o - %s | FileCheck %s
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# Check that an implicit use is generated for a predicated instruction
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# when a subregister of the redefined register is live.
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# CHECK-LABEL: name: foo
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# Verify the predicated block:
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# CHECK-LABEL: bb.0:
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# CHECK: liveins: $r0, $r1, $p0, $d8
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# CHECK: $d8 = A2_combinew killed $r0, killed $r1
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# CHECK: $d8 = L2_ploadrdf_io $p0, $r29, 0, implicit killed $d8
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# CHECK: J2_jumprf killed $p0, $r31, implicit-def $pc, implicit-def $pc, implicit $d8
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--- |
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define void @foo() {
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ret void
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}
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...
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---
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name: foo
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alignment: 4
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0' }
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- { reg: '$r1' }
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- { reg: '$p0' }
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- { reg: '$d8' }
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body: |
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bb.0:
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successors: %bb.1, %bb.2
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liveins: $r0, $r1, $p0, $d8
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$d8 = A2_combinew killed $r0, killed $r1
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J2_jumpf killed $p0, %bb.2, implicit-def $pc
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bb.1:
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liveins: $r17
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$r0 = A2_tfrsi 0
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$r1 = A2_tfrsi 0
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A2_nop ; non-predicable
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J2_jumpr killed $r31, implicit-def dead $pc, implicit killed $d0
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bb.2:
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; Predicate this block.
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$d8 = L2_loadrd_io $r29, 0
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J2_jumpr killed $r31, implicit-def dead $pc, implicit killed $d8
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...
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