forked from OSchip/llvm-project
47 lines
1.5 KiB
LLVM
47 lines
1.5 KiB
LLVM
; RUN: llc -march=hexagon -O3 -verify-machineinstrs < %s
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; REQUIRES: asserts
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target triple = "hexagon"
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%s.0 = type { %s.1* }
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%s.1 = type { %s.2, %s.2**, i32, i32, i8, %s.3 }
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%s.2 = type { i32 (...)**, i32 }
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%s.3 = type { %s.4, %s.6, i32, i32 }
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%s.4 = type { %s.5 }
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%s.5 = type { i8 }
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%s.6 = type { i8*, [12 x i8] }
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%s.7 = type { %s.2, %s.8 }
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%s.8 = type { %s.9*, %s.9* }
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%s.9 = type { [16 x i16*] }
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%s.10 = type { i32 (...)**, i32, i8, i8, i16, i32, i32, %s.11*, %s.12*, %s.0* }
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%s.11 = type { %s.11*, i32, i32, i8* }
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%s.12 = type { %s.12*, i32, void (i8, %s.10*, i32)* }
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define i32 @f0() #0 personality i8* bitcast (i32 (...)* @f2 to i8*) {
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b0:
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%v0 = invoke dereferenceable(4) %s.0* @f1()
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to label %b1 unwind label %b2
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b1: ; preds = %b0
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%v1 = load i32, i32* undef, align 4
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%v2 = icmp eq i32 %v1, 0
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%v3 = zext i1 %v2 to i64
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%v4 = shl nuw nsw i64 %v3, 32
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%v5 = or i64 %v4, 0
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%v6 = call i64 @f3(%s.7* undef, i64 %v5, i64 4294967296, %s.10* nonnull dereferenceable(32) undef, i8* nonnull dereferenceable(1) undef, i32* nonnull dereferenceable(4) undef)
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unreachable
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b2: ; preds = %b0
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%v7 = landingpad { i8*, i32 }
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cleanup
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resume { i8*, i32 } undef
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}
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declare dereferenceable(4) %s.0* @f1()
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declare i32 @f2(...)
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declare i64 @f3(%s.7* nocapture readnone, i64, i64, %s.10* nocapture readonly dereferenceable(32), i8* nocapture dereferenceable(1), i32* nocapture dereferenceable(4)) unnamed_addr align 2
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attributes #0 = { "target-cpu"="hexagonv55" }
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