llvm-project/llvm/test/CodeGen
Alexander Ivchenko dd5b2396d3 [x86] Add test/CodeGen/X86/vmaskmov-offset.ll. NFC.
Needed for checking current code generation.

llvm-svn: 324601
2018-02-08 13:16:42 +00:00
..
AArch64 [AArch64] Don't materialize 0 with "fmov h0, .." when FullFP16 is not supported 2018-02-08 08:39:05 +00:00
AMDGPU AMDGPU: Fix incorrect reordering when inline asm defines LDS address 2018-02-08 01:56:14 +00:00
ARC
ARM [CodeGen] Print MachineBasicBlock labels using MIR syntax in -debug output 2018-02-08 05:02:00 +00:00
AVR [AVR] Fix the testsuite after '%' changed to '$' in MIR 2018-02-08 09:17:11 +00:00
BPF bpf: Improve expanding logic in LowerSELECT_CC 2018-02-08 04:37:49 +00:00
Generic [CodeGen] Print MachineBasicBlock labels using MIR syntax in -debug output 2018-02-08 05:02:00 +00:00
Hexagon [CodeGen] Print MachineBasicBlock labels using MIR syntax in -debug output 2018-02-08 05:02:00 +00:00
Inputs
Lanai Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
MIR Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
MSP430 Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
Mips Revert accidental changes that snuck in r324584 2018-02-08 09:31:48 +00:00
NVPTX Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
Nios2 [Nios2] Arithmetic instructions for R1 and R2 ISA. 2018-01-09 11:15:08 +00:00
PowerPC [MergeICmps] Re-commit rL324317 "Enable the MergeICmps Pass by default." 2018-02-07 09:58:55 +00:00
RISCV [RISCV] Update two RISCV codegen tests after rL323991 2018-02-03 13:02:30 +00:00
SPARC [MachineCopyPropagation] Extend pass to do COPY source forwarding 2018-02-01 18:54:01 +00:00
SystemZ [SelectionDAG] Consider endianness in scalarizeVectorStore(). 2018-02-02 08:48:02 +00:00
Thumb [LivePhysRegs] Fix handling of return instructions. 2018-02-06 23:00:17 +00:00
Thumb2 Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
WebAssembly [WebAssembly] Fix test expectations after r324274 2018-02-06 01:21:17 +00:00
WinCFGuard Reland "Emit Function IDs table for Control Flow Guard" 2018-01-09 23:49:30 +00:00
WinEH
X86 [x86] Add test/CodeGen/X86/vmaskmov-offset.ll. NFC. 2018-02-08 13:16:42 +00:00
XCore Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00