forked from OSchip/llvm-project
118099a62c
Allow a tied operand of a different operand class in InstAliases, so that the operand can be printed (and added to the MC instruction) as the appropriate register. For example, 'GPR64as32', which would be printed/parsed as a 32bit register and should match a tied 64bit register operand, where the former is a sub-register of the latter. This patch also generalizes the constraint checking to an overrideable method in MCTargetAsmParser, so that target asmparsers can specify whether a given operand satisfies the tied register constraint. Reviewers: olista01, rengolin, fhahn, SjoerdMeijer, samparker, dsanders, craig.topper Reviewed By: fhahn Differential Revision: https://reviews.llvm.org/D47714 llvm-svn: 334942 |
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| tools | ||
| unittests | ||
| utils | ||
| .arcconfig | ||
| .clang-format | ||
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| .gitattributes | ||
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| CMakeLists.txt | ||
| CODE_OWNERS.TXT | ||
| CREDITS.TXT | ||
| LICENSE.TXT | ||
| LLVMBuild.txt | ||
| README.txt | ||
| RELEASE_TESTERS.TXT | ||
| configure | ||
| llvm.spec.in | ||
README.txt
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