forked from OSchip/llvm-project
579 lines
19 KiB
C++
579 lines
19 KiB
C++
//===- CostModel.cpp ------ Cost Model Analysis ---------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the cost model analysis. It provides a very basic cost
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// estimation for LLVM-IR. This analysis uses the services of the codegen
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// to approximate the cost of any IR instruction when lowered to machine
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// instructions. The cost results are unit-less and the cost number represents
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// the throughput of the machine assuming that all loads hit the cache, all
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// branches are predicted, etc. The cost numbers can be added in order to
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// compare two or more transformation alternatives.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/Analysis/Passes.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/Analysis/VectorUtils.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/Value.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define CM_NAME "cost-model"
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#define DEBUG_TYPE CM_NAME
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static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false),
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cl::Hidden,
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cl::desc("Recognize reduction patterns."));
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namespace {
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class CostModelAnalysis : public FunctionPass {
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public:
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static char ID; // Class identification, replacement for typeinfo
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CostModelAnalysis() : FunctionPass(ID), F(nullptr), TTI(nullptr) {
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initializeCostModelAnalysisPass(
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*PassRegistry::getPassRegistry());
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}
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/// Returns the expected cost of the instruction.
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/// Returns -1 if the cost is unknown.
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/// Note, this method does not cache the cost calculation and it
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/// can be expensive in some cases.
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unsigned getInstructionCost(const Instruction *I) const;
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private:
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void getAnalysisUsage(AnalysisUsage &AU) const override;
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bool runOnFunction(Function &F) override;
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void print(raw_ostream &OS, const Module*) const override;
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/// The function that we analyze.
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Function *F;
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/// Target information.
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const TargetTransformInfo *TTI;
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};
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} // End of anonymous namespace
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// Register this pass.
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char CostModelAnalysis::ID = 0;
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static const char cm_name[] = "Cost Model Analysis";
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INITIALIZE_PASS_BEGIN(CostModelAnalysis, CM_NAME, cm_name, false, true)
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INITIALIZE_PASS_END (CostModelAnalysis, CM_NAME, cm_name, false, true)
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FunctionPass *llvm::createCostModelAnalysisPass() {
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return new CostModelAnalysis();
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}
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void
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CostModelAnalysis::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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}
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bool
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CostModelAnalysis::runOnFunction(Function &F) {
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this->F = &F;
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auto *TTIWP = getAnalysisIfAvailable<TargetTransformInfoWrapperPass>();
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TTI = TTIWP ? &TTIWP->getTTI(F) : nullptr;
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return false;
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}
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static bool isReverseVectorMask(ArrayRef<int> Mask) {
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for (unsigned i = 0, MaskSize = Mask.size(); i < MaskSize; ++i)
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if (Mask[i] >= 0 && Mask[i] != (int)(MaskSize - 1 - i))
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return false;
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return true;
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}
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static bool isSingleSourceVectorMask(ArrayRef<int> Mask) {
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bool Vec0 = false;
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bool Vec1 = false;
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for (unsigned i = 0, NumVecElts = Mask.size(); i < NumVecElts; ++i) {
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if (Mask[i] >= 0) {
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if ((unsigned)Mask[i] >= NumVecElts)
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Vec1 = true;
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else
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Vec0 = true;
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}
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}
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return !(Vec0 && Vec1);
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}
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static bool isZeroEltBroadcastVectorMask(ArrayRef<int> Mask) {
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for (unsigned i = 0; i < Mask.size(); ++i)
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if (Mask[i] > 0)
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return false;
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return true;
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}
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static bool isAlternateVectorMask(ArrayRef<int> Mask) {
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bool isAlternate = true;
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unsigned MaskSize = Mask.size();
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// Example: shufflevector A, B, <0,5,2,7>
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for (unsigned i = 0; i < MaskSize && isAlternate; ++i) {
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if (Mask[i] < 0)
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continue;
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isAlternate = Mask[i] == (int)((i & 1) ? MaskSize + i : i);
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}
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if (isAlternate)
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return true;
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isAlternate = true;
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// Example: shufflevector A, B, <4,1,6,3>
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for (unsigned i = 0; i < MaskSize && isAlternate; ++i) {
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if (Mask[i] < 0)
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continue;
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isAlternate = Mask[i] == (int)((i & 1) ? i : MaskSize + i);
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}
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return isAlternate;
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}
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static TargetTransformInfo::OperandValueKind getOperandInfo(Value *V) {
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TargetTransformInfo::OperandValueKind OpInfo =
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TargetTransformInfo::OK_AnyValue;
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// Check for a splat of a constant or for a non uniform vector of constants.
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if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
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OpInfo = TargetTransformInfo::OK_NonUniformConstantValue;
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if (cast<Constant>(V)->getSplatValue() != nullptr)
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OpInfo = TargetTransformInfo::OK_UniformConstantValue;
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}
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// Check for a splat of a uniform value. This is not loop aware, so return
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// true only for the obviously uniform cases (argument, globalvalue)
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const Value *Splat = getSplatValue(V);
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if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat)))
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OpInfo = TargetTransformInfo::OK_UniformValue;
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return OpInfo;
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}
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static bool matchPairwiseShuffleMask(ShuffleVectorInst *SI, bool IsLeft,
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unsigned Level) {
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// We don't need a shuffle if we just want to have element 0 in position 0 of
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// the vector.
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if (!SI && Level == 0 && IsLeft)
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return true;
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else if (!SI)
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return false;
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SmallVector<int, 32> Mask(SI->getType()->getVectorNumElements(), -1);
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// Build a mask of 0, 2, ... (left) or 1, 3, ... (right) depending on whether
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// we look at the left or right side.
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for (unsigned i = 0, e = (1 << Level), val = !IsLeft; i != e; ++i, val += 2)
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Mask[i] = val;
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SmallVector<int, 16> ActualMask = SI->getShuffleMask();
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return Mask == ActualMask;
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}
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static bool matchPairwiseReductionAtLevel(const BinaryOperator *BinOp,
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unsigned Level, unsigned NumLevels) {
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// Match one level of pairwise operations.
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// %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
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// <4 x i32> <i32 0, i32 2 , i32 undef, i32 undef>
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// %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef,
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// <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
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// %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
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if (BinOp == nullptr)
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return false;
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assert(BinOp->getType()->isVectorTy() && "Expecting a vector type");
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unsigned Opcode = BinOp->getOpcode();
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Value *L = BinOp->getOperand(0);
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Value *R = BinOp->getOperand(1);
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ShuffleVectorInst *LS = dyn_cast<ShuffleVectorInst>(L);
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if (!LS && Level)
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return false;
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ShuffleVectorInst *RS = dyn_cast<ShuffleVectorInst>(R);
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if (!RS && Level)
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return false;
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// On level 0 we can omit one shufflevector instruction.
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if (!Level && !RS && !LS)
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return false;
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// Shuffle inputs must match.
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Value *NextLevelOpL = LS ? LS->getOperand(0) : nullptr;
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Value *NextLevelOpR = RS ? RS->getOperand(0) : nullptr;
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Value *NextLevelOp = nullptr;
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if (NextLevelOpR && NextLevelOpL) {
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// If we have two shuffles their operands must match.
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if (NextLevelOpL != NextLevelOpR)
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return false;
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NextLevelOp = NextLevelOpL;
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} else if (Level == 0 && (NextLevelOpR || NextLevelOpL)) {
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// On the first level we can omit the shufflevector <0, undef,...>. So the
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// input to the other shufflevector <1, undef> must match with one of the
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// inputs to the current binary operation.
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// Example:
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// %NextLevelOpL = shufflevector %R, <1, undef ...>
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// %BinOp = fadd %NextLevelOpL, %R
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if (NextLevelOpL && NextLevelOpL != R)
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return false;
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else if (NextLevelOpR && NextLevelOpR != L)
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return false;
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NextLevelOp = NextLevelOpL ? R : L;
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} else
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return false;
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// Check that the next levels binary operation exists and matches with the
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// current one.
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BinaryOperator *NextLevelBinOp = nullptr;
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if (Level + 1 != NumLevels) {
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if (!(NextLevelBinOp = dyn_cast<BinaryOperator>(NextLevelOp)))
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return false;
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else if (NextLevelBinOp->getOpcode() != Opcode)
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return false;
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}
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// Shuffle mask for pairwise operation must match.
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if (matchPairwiseShuffleMask(LS, true, Level)) {
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if (!matchPairwiseShuffleMask(RS, false, Level))
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return false;
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} else if (matchPairwiseShuffleMask(RS, true, Level)) {
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if (!matchPairwiseShuffleMask(LS, false, Level))
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return false;
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} else
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return false;
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if (++Level == NumLevels)
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return true;
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// Match next level.
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return matchPairwiseReductionAtLevel(NextLevelBinOp, Level, NumLevels);
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}
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static bool matchPairwiseReduction(const ExtractElementInst *ReduxRoot,
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unsigned &Opcode, Type *&Ty) {
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if (!EnableReduxCost)
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return false;
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// Need to extract the first element.
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ConstantInt *CI = dyn_cast<ConstantInt>(ReduxRoot->getOperand(1));
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unsigned Idx = ~0u;
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if (CI)
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Idx = CI->getZExtValue();
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if (Idx != 0)
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return false;
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BinaryOperator *RdxStart = dyn_cast<BinaryOperator>(ReduxRoot->getOperand(0));
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if (!RdxStart)
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return false;
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Type *VecTy = ReduxRoot->getOperand(0)->getType();
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unsigned NumVecElems = VecTy->getVectorNumElements();
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if (!isPowerOf2_32(NumVecElems))
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return false;
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// We look for a sequence of shuffle,shuffle,add triples like the following
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// that builds a pairwise reduction tree.
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//
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// (X0, X1, X2, X3)
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// (X0 + X1, X2 + X3, undef, undef)
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// ((X0 + X1) + (X2 + X3), undef, undef, undef)
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//
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// %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
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// <4 x i32> <i32 0, i32 2 , i32 undef, i32 undef>
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// %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef,
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// <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
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// %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
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// %rdx.shuf.1.0 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
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// <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
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// %rdx.shuf.1.1 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
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// <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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// %bin.rdx8 = fadd <4 x float> %rdx.shuf.1.0, %rdx.shuf.1.1
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// %r = extractelement <4 x float> %bin.rdx8, i32 0
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if (!matchPairwiseReductionAtLevel(RdxStart, 0, Log2_32(NumVecElems)))
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return false;
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Opcode = RdxStart->getOpcode();
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Ty = VecTy;
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return true;
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}
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static std::pair<Value *, ShuffleVectorInst *>
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getShuffleAndOtherOprd(BinaryOperator *B) {
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Value *L = B->getOperand(0);
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Value *R = B->getOperand(1);
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ShuffleVectorInst *S = nullptr;
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if ((S = dyn_cast<ShuffleVectorInst>(L)))
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return std::make_pair(R, S);
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S = dyn_cast<ShuffleVectorInst>(R);
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return std::make_pair(L, S);
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}
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static bool matchVectorSplittingReduction(const ExtractElementInst *ReduxRoot,
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unsigned &Opcode, Type *&Ty) {
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if (!EnableReduxCost)
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return false;
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// Need to extract the first element.
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ConstantInt *CI = dyn_cast<ConstantInt>(ReduxRoot->getOperand(1));
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unsigned Idx = ~0u;
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if (CI)
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Idx = CI->getZExtValue();
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if (Idx != 0)
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return false;
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BinaryOperator *RdxStart = dyn_cast<BinaryOperator>(ReduxRoot->getOperand(0));
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if (!RdxStart)
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return false;
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unsigned RdxOpcode = RdxStart->getOpcode();
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Type *VecTy = ReduxRoot->getOperand(0)->getType();
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unsigned NumVecElems = VecTy->getVectorNumElements();
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if (!isPowerOf2_32(NumVecElems))
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return false;
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// We look for a sequence of shuffles and adds like the following matching one
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// fadd, shuffle vector pair at a time.
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//
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// %rdx.shuf = shufflevector <4 x float> %rdx, <4 x float> undef,
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// <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
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// %bin.rdx = fadd <4 x float> %rdx, %rdx.shuf
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// %rdx.shuf7 = shufflevector <4 x float> %bin.rdx, <4 x float> undef,
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// <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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// %bin.rdx8 = fadd <4 x float> %bin.rdx, %rdx.shuf7
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// %r = extractelement <4 x float> %bin.rdx8, i32 0
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unsigned MaskStart = 1;
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Value *RdxOp = RdxStart;
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SmallVector<int, 32> ShuffleMask(NumVecElems, 0);
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unsigned NumVecElemsRemain = NumVecElems;
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while (NumVecElemsRemain - 1) {
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// Check for the right reduction operation.
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BinaryOperator *BinOp;
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if (!(BinOp = dyn_cast<BinaryOperator>(RdxOp)))
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return false;
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if (BinOp->getOpcode() != RdxOpcode)
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return false;
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Value *NextRdxOp;
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ShuffleVectorInst *Shuffle;
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std::tie(NextRdxOp, Shuffle) = getShuffleAndOtherOprd(BinOp);
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// Check the current reduction operation and the shuffle use the same value.
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if (Shuffle == nullptr)
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return false;
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if (Shuffle->getOperand(0) != NextRdxOp)
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return false;
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// Check that shuffle masks matches.
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for (unsigned j = 0; j != MaskStart; ++j)
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ShuffleMask[j] = MaskStart + j;
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// Fill the rest of the mask with -1 for undef.
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std::fill(&ShuffleMask[MaskStart], ShuffleMask.end(), -1);
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SmallVector<int, 16> Mask = Shuffle->getShuffleMask();
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if (ShuffleMask != Mask)
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return false;
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RdxOp = NextRdxOp;
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NumVecElemsRemain /= 2;
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MaskStart *= 2;
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}
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Opcode = RdxOpcode;
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Ty = VecTy;
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return true;
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}
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unsigned CostModelAnalysis::getInstructionCost(const Instruction *I) const {
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if (!TTI)
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return -1;
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switch (I->getOpcode()) {
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case Instruction::GetElementPtr:
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return TTI->getUserCost(I);
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case Instruction::Ret:
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case Instruction::PHI:
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case Instruction::Br: {
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return TTI->getCFInstrCost(I->getOpcode());
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}
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case Instruction::Add:
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case Instruction::FAdd:
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case Instruction::Sub:
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case Instruction::FSub:
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case Instruction::Mul:
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case Instruction::FMul:
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case Instruction::UDiv:
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case Instruction::SDiv:
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case Instruction::FDiv:
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case Instruction::URem:
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case Instruction::SRem:
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case Instruction::FRem:
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case Instruction::Shl:
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case Instruction::LShr:
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case Instruction::AShr:
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Xor: {
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TargetTransformInfo::OperandValueKind Op1VK =
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getOperandInfo(I->getOperand(0));
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TargetTransformInfo::OperandValueKind Op2VK =
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getOperandInfo(I->getOperand(1));
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SmallVector<const Value*, 2> Operands(I->operand_values());
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return TTI->getArithmeticInstrCost(I->getOpcode(), I->getType(), Op1VK,
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Op2VK, TargetTransformInfo::OP_None,
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TargetTransformInfo::OP_None,
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Operands);
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}
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case Instruction::Select: {
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const SelectInst *SI = cast<SelectInst>(I);
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Type *CondTy = SI->getCondition()->getType();
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return TTI->getCmpSelInstrCost(I->getOpcode(), I->getType(), CondTy);
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}
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case Instruction::ICmp:
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case Instruction::FCmp: {
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Type *ValTy = I->getOperand(0)->getType();
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return TTI->getCmpSelInstrCost(I->getOpcode(), ValTy);
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}
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case Instruction::Store: {
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const StoreInst *SI = cast<StoreInst>(I);
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Type *ValTy = SI->getValueOperand()->getType();
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return TTI->getMemoryOpCost(I->getOpcode(), ValTy,
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SI->getAlignment(),
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SI->getPointerAddressSpace());
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}
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case Instruction::Load: {
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const LoadInst *LI = cast<LoadInst>(I);
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return TTI->getMemoryOpCost(I->getOpcode(), I->getType(),
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LI->getAlignment(),
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LI->getPointerAddressSpace());
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}
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case Instruction::ZExt:
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case Instruction::SExt:
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case Instruction::FPToUI:
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case Instruction::FPToSI:
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case Instruction::FPExt:
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case Instruction::PtrToInt:
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case Instruction::IntToPtr:
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case Instruction::SIToFP:
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case Instruction::UIToFP:
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case Instruction::Trunc:
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case Instruction::FPTrunc:
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case Instruction::BitCast:
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case Instruction::AddrSpaceCast: {
|
|
Type *SrcTy = I->getOperand(0)->getType();
|
|
return TTI->getCastInstrCost(I->getOpcode(), I->getType(), SrcTy);
|
|
}
|
|
case Instruction::ExtractElement: {
|
|
const ExtractElementInst * EEI = cast<ExtractElementInst>(I);
|
|
ConstantInt *CI = dyn_cast<ConstantInt>(I->getOperand(1));
|
|
unsigned Idx = -1;
|
|
if (CI)
|
|
Idx = CI->getZExtValue();
|
|
|
|
// Try to match a reduction sequence (series of shufflevector and vector
|
|
// adds followed by a extractelement).
|
|
unsigned ReduxOpCode;
|
|
Type *ReduxType;
|
|
|
|
if (matchVectorSplittingReduction(EEI, ReduxOpCode, ReduxType))
|
|
return TTI->getReductionCost(ReduxOpCode, ReduxType, false);
|
|
else if (matchPairwiseReduction(EEI, ReduxOpCode, ReduxType))
|
|
return TTI->getReductionCost(ReduxOpCode, ReduxType, true);
|
|
|
|
return TTI->getVectorInstrCost(I->getOpcode(),
|
|
EEI->getOperand(0)->getType(), Idx);
|
|
}
|
|
case Instruction::InsertElement: {
|
|
const InsertElementInst * IE = cast<InsertElementInst>(I);
|
|
ConstantInt *CI = dyn_cast<ConstantInt>(IE->getOperand(2));
|
|
unsigned Idx = -1;
|
|
if (CI)
|
|
Idx = CI->getZExtValue();
|
|
return TTI->getVectorInstrCost(I->getOpcode(),
|
|
IE->getType(), Idx);
|
|
}
|
|
case Instruction::ShuffleVector: {
|
|
const ShuffleVectorInst *Shuffle = cast<ShuffleVectorInst>(I);
|
|
Type *VecTypOp0 = Shuffle->getOperand(0)->getType();
|
|
unsigned NumVecElems = VecTypOp0->getVectorNumElements();
|
|
SmallVector<int, 16> Mask = Shuffle->getShuffleMask();
|
|
|
|
if (NumVecElems == Mask.size()) {
|
|
if (isReverseVectorMask(Mask))
|
|
return TTI->getShuffleCost(TargetTransformInfo::SK_Reverse, VecTypOp0,
|
|
0, nullptr);
|
|
if (isAlternateVectorMask(Mask))
|
|
return TTI->getShuffleCost(TargetTransformInfo::SK_Alternate,
|
|
VecTypOp0, 0, nullptr);
|
|
|
|
if (isZeroEltBroadcastVectorMask(Mask))
|
|
return TTI->getShuffleCost(TargetTransformInfo::SK_Broadcast,
|
|
VecTypOp0, 0, nullptr);
|
|
|
|
if (isSingleSourceVectorMask(Mask))
|
|
return TTI->getShuffleCost(TargetTransformInfo::SK_PermuteSingleSrc,
|
|
VecTypOp0, 0, nullptr);
|
|
|
|
return TTI->getShuffleCost(TargetTransformInfo::SK_PermuteTwoSrc,
|
|
VecTypOp0, 0, nullptr);
|
|
}
|
|
|
|
return -1;
|
|
}
|
|
case Instruction::Call:
|
|
if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
|
|
SmallVector<Value *, 4> Args;
|
|
for (unsigned J = 0, JE = II->getNumArgOperands(); J != JE; ++J)
|
|
Args.push_back(II->getArgOperand(J));
|
|
|
|
FastMathFlags FMF;
|
|
if (auto *FPMO = dyn_cast<FPMathOperator>(II))
|
|
FMF = FPMO->getFastMathFlags();
|
|
|
|
return TTI->getIntrinsicInstrCost(II->getIntrinsicID(), II->getType(),
|
|
Args, FMF);
|
|
}
|
|
return -1;
|
|
default:
|
|
// We don't have any information on this instruction.
|
|
return -1;
|
|
}
|
|
}
|
|
|
|
void CostModelAnalysis::print(raw_ostream &OS, const Module*) const {
|
|
if (!F)
|
|
return;
|
|
|
|
for (BasicBlock &B : *F) {
|
|
for (Instruction &Inst : B) {
|
|
unsigned Cost = getInstructionCost(&Inst);
|
|
if (Cost != (unsigned)-1)
|
|
OS << "Cost Model: Found an estimated cost of " << Cost;
|
|
else
|
|
OS << "Cost Model: Unknown cost";
|
|
|
|
OS << " for instruction: " << Inst << "\n";
|
|
}
|
|
}
|
|
}
|