Zlatko Buljan 94af4cbcf4 [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions ... Differential Revision: http://reviews.llvm.org/D17137 llvm-svn: 264248		2016-03-24 09:22:45 +00:00
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AArch64	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
AMDGPU	[AMDGPU] Fix missing assembler predicates.	2016-03-23 04:27:26 +00:00
ARM	[ARM] Add new system registers to ARMv8-M Baseline/Mainline	2016-01-25 11:25:36 +00:00
Hexagon	[Hexagon] Fixing store instructions and reenabling a few more tests.	2015-11-10 00:22:00 +00:00
Mips	[mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions	2016-03-24 09:22:45 +00:00
PowerPC	[Power9] Implement new vsx instructions: load, store instructions for vector and scalar	2016-03-08 03:49:13 +00:00
Sparc	This change adds co-processor condition branching and conditional traps to the Sparc back-end.	2016-03-09 18:20:21 +00:00
SystemZ	[SystemZ] Add assembly instructions for obtaining clock values as well as CPU features	2015-10-01 14:43:48 +00:00
X86	AVX512F: Add GATHER/SCATTER assembler Intel syntax tests for knl/skx/avx . Change memory operand parser handling.	2016-02-25 13:30:17 +00:00
XCore	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00