llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi-invalid.mir

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# RUN: llc -march=amdgcn -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o /dev/null 2>&1 | FileCheck %s -check-prefix=ERR
# ERR: remark: <unknown>:0:0: cannot select: %7:scc(s1) = G_PHI %4:scc(s1), %bb.0, %6:scc(s1), %bb.1 (in function: g_phi_scc_s1_sbranch)
---
name: g_phi_scc_s1_sbranch
legalized: true
regBankSelected: true
tracksRegLiveness: true
machineFunctionInfo: {}
body: |
bb.0:
liveins: $sgpr0, $sgpr1, $sgpr2
%0:sgpr(s32) = COPY $sgpr0
%1:sgpr(s32) = COPY $sgpr1
%2:sgpr(s32) = COPY $sgpr2
%3:sgpr(s32) = G_CONSTANT i32 0
%4:scc(s1) = G_ICMP intpred(eq), %0, %3
%5:scc(s1) = G_ICMP intpred(eq), %2(s32), %3
G_BRCOND %5(s1), %bb.1
G_BR %bb.2
bb.1:
%6:scc(s1) = G_ICMP intpred(eq), %1, %3
G_BR %bb.2
bb.2:
%7:scc(s1) = G_PHI %4, %bb.0, %6, %bb.1
S_SETPC_B64 undef $sgpr30_sgpr31, implicit %7
...