forked from OSchip/llvm-project
92 lines
4.7 KiB
YAML
92 lines
4.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX6 %s
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# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
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# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
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---
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name: atomic_cmpxchg_s32_local
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX6-LABEL: name: atomic_cmpxchg_s32_local
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; GFX6: liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; GFX6: $m0 = S_MOV_B32 -1
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; GFX6: [[DS_CMPST_RTN_B32_:%[0-9]+]]:vgpr_32 = DS_CMPST_RTN_B32 [[COPY]], [[COPY1]], [[COPY2]], 0, 0, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 3)
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; GFX6: $vgpr0 = COPY [[DS_CMPST_RTN_B32_]]
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; GFX7-LABEL: name: atomic_cmpxchg_s32_local
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; GFX7: liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; GFX7: $m0 = S_MOV_B32 -1
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; GFX7: [[DS_CMPST_RTN_B32_:%[0-9]+]]:vgpr_32 = DS_CMPST_RTN_B32 [[COPY]], [[COPY1]], [[COPY2]], 0, 0, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 3)
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; GFX7: $vgpr0 = COPY [[DS_CMPST_RTN_B32_]]
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; GFX9-LABEL: name: atomic_cmpxchg_s32_local
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; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; GFX9: [[DS_CMPST_RTN_B32_gfx9_:%[0-9]+]]:vgpr_32 = DS_CMPST_RTN_B32_gfx9 [[COPY]], [[COPY1]], [[COPY2]], 0, 0, implicit $exec :: (load store seq_cst 4, addrspace 3)
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; GFX9: $vgpr0 = COPY [[DS_CMPST_RTN_B32_gfx9_]]
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%0:vgpr(p3) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = COPY $vgpr2
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%3:vgpr(s32) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store seq_cst 4, addrspace 3)
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$vgpr0 = COPY %3
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...
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---
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name: atomic_cmpxchg_s32_local_gep4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX6-LABEL: name: atomic_cmpxchg_s32_local_gep4
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; GFX6: liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; GFX6: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
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; GFX6: %4:vgpr_32, dead %6:sreg_64_xexec = V_ADD_I32_e64 [[COPY]], [[V_MOV_B32_e32_]], 0, implicit $exec
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; GFX6: $m0 = S_MOV_B32 -1
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; GFX6: [[DS_CMPST_RTN_B32_:%[0-9]+]]:vgpr_32 = DS_CMPST_RTN_B32 %4, [[COPY1]], [[COPY2]], 0, 0, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 3)
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; GFX6: $vgpr0 = COPY [[DS_CMPST_RTN_B32_]]
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; GFX7-LABEL: name: atomic_cmpxchg_s32_local_gep4
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; GFX7: liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; GFX7: $m0 = S_MOV_B32 -1
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; GFX7: [[DS_CMPST_RTN_B32_:%[0-9]+]]:vgpr_32 = DS_CMPST_RTN_B32 [[COPY]], [[COPY1]], [[COPY2]], 4, 0, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 3)
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; GFX7: $vgpr0 = COPY [[DS_CMPST_RTN_B32_]]
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; GFX9-LABEL: name: atomic_cmpxchg_s32_local_gep4
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; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; GFX9: [[DS_CMPST_RTN_B32_gfx9_:%[0-9]+]]:vgpr_32 = DS_CMPST_RTN_B32_gfx9 [[COPY]], [[COPY1]], [[COPY2]], 4, 0, implicit $exec :: (load store seq_cst 4, addrspace 3)
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; GFX9: $vgpr0 = COPY [[DS_CMPST_RTN_B32_gfx9_]]
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%0:vgpr(p3) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = COPY $vgpr2
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%3:vgpr(s32) = G_CONSTANT i32 4
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%4:vgpr(p3) = G_GEP %0, %3
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%5:vgpr(s32) = G_ATOMIC_CMPXCHG %4, %1, %2 :: (load store seq_cst 4, addrspace 3)
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$vgpr0 = COPY %5
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...
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