forked from OSchip/llvm-project
208 lines
6.9 KiB
C++
208 lines
6.9 KiB
C++
// llvm/Target/TargetTransformImpl.cpp - Target Loop Trans Info ---*- C++ -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Target/TargetTransformImpl.h"
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#include "llvm/Target/TargetLowering.h"
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#include <utility>
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using namespace llvm;
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//===----------------------------------------------------------------------===//
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//
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// Calls used by scalar transformations.
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//
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//===----------------------------------------------------------------------===//
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bool ScalarTargetTransformImpl::isLegalAddImmediate(int64_t imm) const {
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return TLI->isLegalAddImmediate(imm);
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}
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bool ScalarTargetTransformImpl::isLegalICmpImmediate(int64_t imm) const {
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return TLI->isLegalICmpImmediate(imm);
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}
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bool ScalarTargetTransformImpl::isLegalAddressingMode(const AddrMode &AM,
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Type *Ty) const {
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return TLI->isLegalAddressingMode(AM, Ty);
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}
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bool ScalarTargetTransformImpl::isTruncateFree(Type *Ty1, Type *Ty2) const {
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return TLI->isTruncateFree(Ty1, Ty2);
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}
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bool ScalarTargetTransformImpl::isTypeLegal(Type *Ty) const {
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EVT T = TLI->getValueType(Ty);
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return TLI->isTypeLegal(T);
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}
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unsigned ScalarTargetTransformImpl::getJumpBufAlignment() const {
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return TLI->getJumpBufAlignment();
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}
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unsigned ScalarTargetTransformImpl::getJumpBufSize() const {
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return TLI->getJumpBufSize();
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}
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//===----------------------------------------------------------------------===//
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//
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// Calls used by the vectorizers.
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//
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//===----------------------------------------------------------------------===//
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static int InstructionOpcodeToISD(unsigned Opcode) {
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enum InstructionOpcodes {
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#define HANDLE_INST(NUM, OPCODE, CLASS) OPCODE = NUM,
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#define LAST_OTHER_INST(NUM) InstructionOpcodesCount = NUM
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#include "llvm/Instruction.def"
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};
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switch (static_cast<InstructionOpcodes>(Opcode)) {
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case Ret: return 0;
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case Br: return 0;
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case Switch: return 0;
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case IndirectBr: return 0;
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case Invoke: return 0;
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case Resume: return 0;
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case Unreachable: return 0;
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case Add: return ISD::ADD;
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case FAdd: return ISD::FADD;
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case Sub: return ISD::SUB;
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case FSub: return ISD::FSUB;
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case Mul: return ISD::MUL;
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case FMul: return ISD::FMUL;
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case UDiv: return ISD::UDIV;
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case SDiv: return ISD::UDIV;
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case FDiv: return ISD::FDIV;
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case URem: return ISD::UREM;
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case SRem: return ISD::SREM;
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case FRem: return ISD::FREM;
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case Shl: return ISD::SHL;
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case LShr: return ISD::SRL;
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case AShr: return ISD::SRA;
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case And: return ISD::AND;
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case Or: return ISD::OR;
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case Xor: return ISD::XOR;
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case Alloca: return 0;
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case Load: return ISD::LOAD;
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case Store: return ISD::STORE;
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case GetElementPtr: return 0;
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case Fence: return 0;
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case AtomicCmpXchg: return 0;
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case AtomicRMW: return 0;
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case Trunc: return ISD::TRUNCATE;
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case ZExt: return ISD::ZERO_EXTEND;
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case SExt: return ISD::SEXTLOAD;
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case FPToUI: return ISD::FP_TO_UINT;
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case FPToSI: return ISD::FP_TO_SINT;
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case UIToFP: return ISD::UINT_TO_FP;
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case SIToFP: return ISD::SINT_TO_FP;
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case FPTrunc: return ISD::FP_ROUND;
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case FPExt: return ISD::FP_EXTEND;
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case PtrToInt: return ISD::BITCAST;
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case IntToPtr: return ISD::BITCAST;
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case BitCast: return ISD::BITCAST;
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case ICmp: return ISD::SETCC;
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case FCmp: return ISD::SETCC;
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case PHI: return 0;
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case Call: return 0;
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case Select: return ISD::SELECT;
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case UserOp1: return 0;
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case UserOp2: return 0;
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case VAArg: return 0;
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case ExtractElement: return ISD::EXTRACT_VECTOR_ELT;
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case InsertElement: return ISD::INSERT_VECTOR_ELT;
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case ShuffleVector: return ISD::VECTOR_SHUFFLE;
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case ExtractValue: return ISD::MERGE_VALUES;
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case InsertValue: return ISD::MERGE_VALUES;
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case LandingPad: return 0;
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}
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llvm_unreachable("Unknown instruction type encountered!");
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}
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std::pair<unsigned, EVT>
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VectorTargetTransformImpl::getTypeLegalizationCost(LLVMContext &C,
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EVT Ty) const {
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unsigned Cost = 1;
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// We keep legalizing the type until we find a legal kind. We assume that
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// the only operation that costs anything is the split. After splitting
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// we need to handle two types.
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while (true) {
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TargetLowering::LegalizeKind LK = TLI->getTypeConversion(C, Ty);
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if (LK.first == TargetLowering::TypeLegal)
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return std::make_pair(Cost, LK.second);
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if (LK.first == TargetLowering::TypeSplitVector)
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Cost *= 2;
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// Keep legalizing the type.
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Ty = LK.second;
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}
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}
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unsigned
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VectorTargetTransformImpl::getInstrCost(unsigned Opcode, Type *Ty1,
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Type *Ty2) const {
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// Check if any of the operands are vector operands.
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int ISD = InstructionOpcodeToISD(Opcode);
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// If we don't have any information about this instruction assume it costs 1.
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if (ISD == 0)
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return 1;
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// Selects on vectors are actually vector selects.
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if (ISD == ISD::SELECT) {
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assert(Ty2 && "Ty2 must hold the condition type");
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if (Ty2->isVectorTy())
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ISD = ISD::VSELECT;
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}
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assert(Ty1 && "We need to have at least one type");
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// From this stage we look at the legalized type.
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std::pair<unsigned, EVT> LT =
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getTypeLegalizationCost(Ty1->getContext(), TLI->getValueType(Ty1));
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if (TLI->isOperationLegalOrCustom(ISD, LT.second)) {
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// The operation is legal. Assume it costs 1. Multiply
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// by the type-legalization overhead.
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return LT.first * 1;
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}
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unsigned NumElem =
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(LT.second.isVector() ? LT.second.getVectorNumElements() : 1);
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// We will probably scalarize this instruction. Assume that the cost is the
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// number of the vector elements.
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return LT.first * NumElem * 1;
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}
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unsigned
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VectorTargetTransformImpl::getBroadcastCost(Type *Tp) const {
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return 1;
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}
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unsigned
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VectorTargetTransformImpl::getMemoryOpCost(unsigned Opcode, Type *Src,
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unsigned Alignment,
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unsigned AddressSpace) const {
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// From this stage we look at the legalized type.
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std::pair<unsigned, EVT> LT =
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getTypeLegalizationCost(Src->getContext(), TLI->getValueType(Src));
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// Assume that all loads of legal types cost 1.
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return LT.first;
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}
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unsigned
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VectorTargetTransformImpl::getNumberOfParts(Type *Tp) const {
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std::pair<unsigned, EVT> LT =
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getTypeLegalizationCost(Tp->getContext(), TLI->getValueType(Tp));
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return LT.first;
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}
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