forked from OSchip/llvm-project
62 lines
1.9 KiB
C++
62 lines
1.9 KiB
C++
//===-- AMDGPUMachineFunctionInfo.cpp ---------------------------------------=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPUMachineFunction.h"
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#include "AMDGPUSubtarget.h"
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using namespace llvm;
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static bool isEntryFunctionCC(CallingConv::ID CC) {
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switch (CC) {
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case CallingConv::AMDGPU_KERNEL:
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case CallingConv::SPIR_KERNEL:
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case CallingConv::AMDGPU_VS:
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case CallingConv::AMDGPU_GS:
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case CallingConv::AMDGPU_PS:
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case CallingConv::AMDGPU_CS:
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return true;
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default:
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return false;
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}
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}
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AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF) :
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MachineFunctionInfo(),
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LocalMemoryObjects(),
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KernArgSize(0),
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MaxKernArgAlign(0),
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LDSSize(0),
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ABIArgOffset(0),
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IsEntryFunction(isEntryFunctionCC(MF.getFunction()->getCallingConv())),
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NoSignedZerosFPMath(MF.getTarget().Options.NoSignedZerosFPMath) {
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// FIXME: Should initialize KernArgSize based on ExplicitKernelArgOffset,
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// except reserved size is not correctly aligned.
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}
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unsigned AMDGPUMachineFunction::allocateLDSGlobal(const DataLayout &DL,
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const GlobalValue &GV) {
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auto Entry = LocalMemoryObjects.insert(std::make_pair(&GV, 0));
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if (!Entry.second)
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return Entry.first->second;
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unsigned Align = GV.getAlignment();
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if (Align == 0)
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Align = DL.getABITypeAlignment(GV.getValueType());
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/// TODO: We should sort these to minimize wasted space due to alignment
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/// padding. Currently the padding is decided by the first encountered use
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/// during lowering.
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unsigned Offset = LDSSize = alignTo(LDSSize, Align);
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Entry.first->second = Offset;
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LDSSize += DL.getTypeAllocSize(GV.getValueType());
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return Offset;
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}
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