forked from OSchip/llvm-project
26 lines
663 B
LLVM
26 lines
663 B
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -regalloc=fast | FileCheck %s -check-prefix=A8
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; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-m3 -regalloc=fast | FileCheck %s -check-prefix=M3
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; rdar://6949835
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; Magic ARM pair hints works best with linearscan / fast.
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; Cortex-M3 errata 602117: LDRD with base in list may result in incorrect base
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; register when interrupted or faulted.
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@b = external global i64*
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define i64 @t(i64 %a) nounwind readonly {
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entry:
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; A8: t:
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; A8: ldrd r2, r3, [r2]
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; M3: t:
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; M3-NOT: ldrd
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; M3: ldm.w r2, {r2, r3}
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%0 = load i64** @b, align 4
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%1 = load i64* %0, align 4
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%2 = mul i64 %1, %a
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ret i64 %2
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}
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