llvm-project/llvm/test/CodeGen
Christudasan Devadasan d7a05698ef [AMDGPU] Move LowerSwitch pass to CodeGenPrepare.
It is possible that LowerSwitch pass leaves certain blocks
unreachable from the entry. If not removed, these dead blocks
can cause undefined behavior in the subsequent passes.
It caused a crash in the AMDGPU backend after the instruction
selection when a PHI node has its incoming values coming from
these unreachable blocks.

In the AMDGPU pass flow, the last invocation of UnreachableBlockElim
precedes where LowerSwitch is currently placed and eventually
missed out on the opportunity to get these blocks eliminated.
This patch ensures that LowerSwitch pass get inserted earlier
to make use of the existing unreachable block elimination pass.

Reviewed By: sameerds, arsenm

Differential Revision: https://reviews.llvm.org/D83584
2020-07-11 16:33:38 +05:30
..
AArch64 [ARM] Add Cortex-A78 and Cortex-X1 Support for Clang and LLVM 2020-07-10 18:24:11 +01:00
AMDGPU [AMDGPU] Move LowerSwitch pass to CodeGenPrepare. 2020-07-11 16:33:38 +05:30
ARC
ARM [ARM] Pass -verify-machineinstr to test and XFAIL until fixed. 2020-07-10 16:44:52 +01:00
AVR [AVR] Rewrite the function calling convention. 2020-06-23 21:36:18 +12:00
BPF [BPF] Fix a BTF gen bug related to a pointer struct member 2020-07-01 09:55:01 -07:00
Generic [LLParser] Delete temp CallInst when error occurs 2020-06-16 11:41:25 +08:00
Hexagon [BasicAA] Rename deprecated -basicaa to -basic-aa 2020-06-26 20:41:37 -07:00
Inputs
Lanai
MIR [MIR] Fix CFI_INSTRUCTION escape printing 2020-06-24 18:15:28 -04:00
MSP430 [MSP430] Declare comparison LibCalls as returning i16 instead of i32 2020-06-30 11:04:22 +03:00
Mips [DAGCombine] Generalize the case (add (or x, c1), c2) -> (add x, (c1 + c2)) 2020-06-12 13:53:08 -04:00
NVPTX [NVPTX] Fix for NVPTX module asm regression 2020-06-24 11:17:09 -07:00
PowerPC [PowerPC][MachinePipeliner] Enable pipeliner if hasInstrSchedModel 2020-07-11 02:24:12 +00:00
RISCV [RISCV][test] Add a test for (mul (add x, c1), c2) -> (add (mul x, c2), c1*c2) transformation 2020-07-10 18:33:12 -07:00
SPARC [SPARC] Lower fp16 ops to libcalls 2020-06-10 19:15:26 -07:00
SystemZ [SystemZ] Simplify knownbits.ll test 2020-06-30 16:31:59 +02:00
Thumb
Thumb2 [ARM] Remove hasSideEffects from FP converts 2020-07-05 16:23:24 +01:00
VE [VE] Support symbol with offset value 2020-07-01 23:55:27 +09:00
WebAssembly [WebAssembly] Prefer v128.const for constant splats 2020-07-10 18:27:52 -07:00
WinCFGuard
WinEH
X86 [X86][MMX] Optimize MMX shift intrinsics. 2020-07-11 11:16:23 +08:00
XCore