forked from OSchip/llvm-project
70 lines
3.2 KiB
YAML
70 lines
3.2 KiB
YAML
# RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -verify-machineinstrs -run-pass greedy,amdgpu-regbanks-reassign,virtregrewriter -o - %s | FileCheck -check-prefix=GCN %s
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# Test that subreg reassignments are correctly handled when whole register also
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# conflicts. If this is mishandled stall counts will be incorrect and cause an
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# infinite loop.
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# GCN-LABEL: vgpr64_mixed_use{{$}}
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# GCN: $vgpr0_vgpr1 = IMPLICIT_DEF
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# GCN: $vgpr4_vgpr5 = IMPLICIT_DEF
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# GCN: $vcc = IMPLICIT_DEF
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# GCN: $vgpr2_vgpr3 = IMPLICIT_DEF
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# GCN: $vgpr6_vgpr7 = IMPLICIT_DEF
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# GCN: $vgpr8_vgpr9_vgpr10_vgpr11 = IMPLICIT_DEF
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# GCN: $vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
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# GCN: $vgpr16_vgpr17_vgpr18_vgpr19 = IMPLICIT_DEF
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# GCN: $vgpr20_vgpr21_vgpr22_vgpr23 = IMPLICIT_DEF
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# GCN: $vgpr24_vgpr25_vgpr26_vgpr27 = IMPLICIT_DEF
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# GCN: $vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
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# GCN: $vgpr32_vgpr33_vgpr34_vgpr35 = IMPLICIT_DEF
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# GCN: $vgpr36_vgpr37_vgpr38_vgpr39 = IMPLICIT_DEF
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# GCN: $vgpr40_vgpr41_vgpr42_vgpr43 = IMPLICIT_DEF
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# GCN: $vgpr44_vgpr45_vgpr46_vgpr47 = IMPLICIT_DEF
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# GCN: $vgpr2 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr5, $vcc, implicit $exec
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# GCN: $vgpr2 = V_CNDMASK_B32_e64 0, $vgpr0, 0, $vgpr4, killed $vcc, implicit $exec
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# GCN: $sgpr0_sgpr1 = V_CMP_LT_U64_e64 $vgpr4_vgpr5, $vgpr0_vgpr1, implicit $exec
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---
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name: vgpr64_mixed_use
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vreg_64, preferred-register: '$vgpr0_vgpr1' }
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- { id: 1, class: vreg_64, preferred-register: '$vgpr4_vgpr5' }
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- { id: 2, class: sreg_64_xexec, preferred-register: '$vcc' }
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- { id: 3, class: vgpr_32 }
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- { id: 4, class: vgpr_32 }
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- { id: 5, class: sreg_64_xexec }
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- { id: 6, class: vreg_64, preferred-register: '$vgpr2_vgpr3' }
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- { id: 7, class: vreg_64, preferred-register: '$vgpr6_vgpr7' }
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- { id: 8, class: vreg_128, preferred-register: '$vgpr8_vgpr9_vgpr10_vgpr11' }
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- { id: 9, class: vreg_128, preferred-register: '$vgpr12_vgpr13_vgpr14_vgpr15' }
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- { id: 10, class: vreg_128, preferred-register: '$vgpr16_vgpr17_vgpr18_vgpr19' }
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- { id: 11, class: vreg_128, preferred-register: '$vgpr20_vgpr21_vgpr22_vgpr23' }
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- { id: 12, class: vreg_128, preferred-register: '$vgpr24_vgpr25_vgpr26_vgpr27' }
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- { id: 13, class: vreg_128, preferred-register: '$vgpr28_vgpr29_vgpr30_vgpr31' }
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- { id: 14, class: vreg_128, preferred-register: '$vgpr32_vgpr33_vgpr34_vgpr35' }
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- { id: 15, class: vreg_128, preferred-register: '$vgpr36_vgpr37_vgpr38_vgpr39' }
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- { id: 16, class: vreg_128, preferred-register: '$vgpr40_vgpr41_vgpr42_vgpr43' }
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- { id: 17, class: vreg_128, preferred-register: '$vgpr44_vgpr45_vgpr46_vgpr47' }
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body: |
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bb.0:
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%0 = IMPLICIT_DEF
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%1 = IMPLICIT_DEF
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%2 = IMPLICIT_DEF
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%6 = IMPLICIT_DEF
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%7 = IMPLICIT_DEF
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%8 = IMPLICIT_DEF
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%9 = IMPLICIT_DEF
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%10 = IMPLICIT_DEF
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%11 = IMPLICIT_DEF
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%12 = IMPLICIT_DEF
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%13 = IMPLICIT_DEF
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%14 = IMPLICIT_DEF
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%15 = IMPLICIT_DEF
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%16 = IMPLICIT_DEF
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%17 = IMPLICIT_DEF
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%3 = V_CNDMASK_B32_e64 0, %0.sub1, 0, %1.sub1, %2, implicit $exec
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%4 = V_CNDMASK_B32_e64 0, %0.sub0, 0, %1.sub0, %2, implicit $exec
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%5 = V_CMP_LT_U64_e64 %1, %0, implicit $exec
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S_ENDPGM 0
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...
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