forked from OSchip/llvm-project
42 lines
1.4 KiB
LLVM
42 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=fiji < %s | FileCheck -check-prefix=GCN %s
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define half @v_sqrt_f16(half %src) {
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; GCN-LABEL: v_sqrt_f16:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_sqrt_f16_e32 v0, v0
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%sqrt = call half @llvm.amdgcn.sqrt.f16(half %src)
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ret half %sqrt
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}
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define half @v_fabs_sqrt_f16(half %src) {
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; GCN-LABEL: v_fabs_sqrt_f16:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_sqrt_f16_e64 v0, |v0|
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%fabs.src = call half @llvm.fabs.f16(half %src)
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%sqrt = call half @llvm.amdgcn.sqrt.f16(half %fabs.src)
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ret half %sqrt
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}
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define half @v_fneg_fabs_sqrt_f16(half %src) {
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; GCN-LABEL: v_fneg_fabs_sqrt_f16:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_sqrt_f16_e64 v0, -|v0|
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%fabs.src = call half @llvm.fabs.f16(half %src)
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%neg.fabs.src = fneg half %fabs.src
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%sqrt = call half @llvm.amdgcn.sqrt.f16(half %neg.fabs.src)
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ret half %sqrt
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}
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declare half @llvm.amdgcn.sqrt.f16(half) #0
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declare half @llvm.fabs.f16(half) #0
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attributes #0 = { nounwind readnone speculatable willreturn }
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