| .. |
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AsmParser
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CMake: Make most target symbols hidden by default
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2020-01-14 19:46:52 -08:00 |
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Disassembler
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CMake: Make most target symbols hidden by default
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2020-01-14 19:46:52 -08:00 |
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MCTargetDesc
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CMake: Make most target symbols hidden by default
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2020-01-14 19:46:52 -08:00 |
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TargetInfo
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CMake: Make most target symbols hidden by default
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2020-01-14 19:46:52 -08:00 |
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Utils
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AMDGPU/R600: Emit rodata in text segment
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2020-01-22 14:31:51 -05:00 |
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AMDGPU.h
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[AMDGPU] Bundle loads before post-RA scheduler
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2020-01-24 11:33:38 -08:00 |
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AMDGPU.td
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[AMDGPU] w/a for gfx908 mfma SrcC literal HW bug
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2019-08-23 22:09:58 +00:00 |
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AMDGPUAliasAnalysis.cpp
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AMDGPU: Improve alias analysis for GDS
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2019-07-17 11:22:19 +00:00 |
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AMDGPUAliasAnalysis.h
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[AliasAnalysis] Second prototype to cache BasicAA / anyAA state.
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2019-03-22 17:22:19 +00:00 |
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AMDGPUAlwaysInlinePass.cpp
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AMDGPU: Simplify getAddressSpace calls
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2019-10-31 07:51:38 -07:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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Use llvm::StringLiteral instead of StringRef in few places
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2019-09-20 14:31:42 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUArgumentUsageInfo.cpp
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[AMDGPU] Packed thread ids in function call ABI
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2019-06-28 01:52:13 +00:00 |
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AMDGPUArgumentUsageInfo.h
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AMDGPU: Fix Register copypaste error
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2019-09-05 23:07:10 +00:00 |
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AMDGPUAsmPrinter.cpp
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CMake: Make most target symbols hidden by default
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2020-01-14 19:46:52 -08:00 |
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AMDGPUAsmPrinter.h
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[AMDGPU] separate accounting for agprs
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2019-10-02 00:26:58 +00:00 |
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AMDGPUAtomicOptimizer.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUCallLowering.cpp
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AMDGPU/GlobalISel: Fix argument lowering for vectors of pointers
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2020-01-09 16:29:44 -05:00 |
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AMDGPUCallLowering.h
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AMDGPU/GlobalISel: Rename MIRBuilder to B. NFC
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2019-09-09 23:06:13 +00:00 |
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AMDGPUCallingConv.td
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AMDGPU: Allow i16 shader arguments
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2020-01-27 06:55:32 -08:00 |
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AMDGPUCodeGenPrepare.cpp
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AMDGPU: Implement FDIV optimizations in AMDGPUCodeGenPrepare
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2020-01-23 16:57:43 -08:00 |
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AMDGPUCombine.td
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AMDGPU/GlobalISel: Add pre-legalize combiner pass
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2020-01-22 10:16:39 -05:00 |
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AMDGPUFeatures.td
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AMDGPU: Fix names for generation features
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2019-04-03 00:01:03 +00:00 |
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AMDGPUFixFunctionBitcasts.cpp
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…
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AMDGPUFrameLowering.cpp
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Use Align for TFL::TransientStackAlignment
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2019-10-21 08:31:25 +00:00 |
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AMDGPUFrameLowering.h
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[Alignment][NFC] Deprecate Align::None()
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2020-01-24 12:53:58 +01:00 |
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AMDGPUGISel.td
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AMDGPU/GlobalISel: Select llvm.amdgcn.raw.tbuffer.store
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2020-01-27 15:16:21 -05:00 |
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AMDGPUGenRegisterBankInfo.def
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AMDGPU/GlobalISel: Fix RegBankSelect for G_INSERT_VECTOR_ELT
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2020-01-22 10:57:50 -05:00 |
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AMDGPUGlobalISelUtils.cpp
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AMDGPU/GlobalISel: Add new utils file
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2020-01-03 15:25:50 -05:00 |
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AMDGPUGlobalISelUtils.h
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AMDGPU/GlobalISel: Add new utils file
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2020-01-03 15:25:50 -05:00 |
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AMDGPUHSAMetadataStreamer.cpp
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[AMDGPU] add support for hostcall buffer pointer as hidden kernel argument
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2019-11-20 15:53:55 +05:30 |
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AMDGPUHSAMetadataStreamer.h
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[llvm] Migrate llvm::make_unique to std::make_unique
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2019-08-15 15:54:37 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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AMDGPU/GlobalISel: Initial selection of MUBUF addr64 load/store
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2020-01-27 07:13:56 -08:00 |
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AMDGPUISelLowering.cpp
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[AMDGPU] Allow narrowing muti-dword loads
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2020-01-24 11:03:41 -08:00 |
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AMDGPUISelLowering.h
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AMDGPU: Remove custom node for exports
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2020-01-15 18:33:15 -05:00 |
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AMDGPUInline.cpp
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[NFC] Refactor InlineResult for readability
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2020-01-15 13:34:20 -08:00 |
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AMDGPUInstrInfo.cpp
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…
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AMDGPUInstrInfo.h
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…
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AMDGPUInstrInfo.td
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AMDGPU: Remove custom node for exports
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2020-01-15 18:33:15 -05:00 |
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AMDGPUInstructionSelector.cpp
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AMDGPU/GlobalISel: Move llvm.amdgcn.raw.buffer.store handling
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2020-01-27 14:59:30 -05:00 |
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AMDGPUInstructionSelector.h
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AMDGPU/GlobalISel: Move llvm.amdgcn.raw.buffer.store handling
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2020-01-27 14:59:30 -05:00 |
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AMDGPUInstructions.td
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AMDGPU: Don't check constant address space for atomic stores
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2020-01-24 12:15:09 -08:00 |
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AMDGPULegalizerInfo.cpp
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AMDGPU/GlobalISel: Select llvm.amdgcn.raw.tbuffer.store
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2020-01-27 15:16:21 -05:00 |
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AMDGPULegalizerInfo.h
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AMDGPU/GlobalISel: Move llvm.amdgcn.raw.buffer.store handling
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2020-01-27 14:59:30 -05:00 |
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AMDGPULibCalls.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPULibFunc.cpp
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[AMDGPU] Downgrade from StringLiteral to const char* in an attempt to make GCC 5 happy
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2019-08-25 12:47:31 +00:00 |
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AMDGPULibFunc.h
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…
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AMDGPULowerIntrinsics.cpp
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…
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AMDGPULowerKernelArguments.cpp
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[Alignement][NFC] Deprecate untyped CreateAlignedLoad
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2020-01-23 13:34:32 +01:00 |
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AMDGPULowerKernelAttributes.cpp
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…
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AMDGPUMCInstLower.cpp
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[MC] Add parameter `Address` to MCInstPrinter::printInst
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2020-01-06 20:42:22 -08:00 |
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AMDGPUMachineCFGStructurizer.cpp
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[AMDGPU] Fixes -Wrange-loop-analysis warnings
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2019-12-22 19:39:28 +01:00 |
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AMDGPUMachineFunction.cpp
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AMDGPU: Refactor treatment of denormal mode
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2019-11-19 19:55:43 +05:30 |
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AMDGPUMachineFunction.h
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AMDGPU: Refactor treatment of denormal mode
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2019-11-19 19:55:43 +05:30 |
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AMDGPUMachineModuleInfo.cpp
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AMDGPU: Add support for cross address space synchronization scopes
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2019-03-25 20:50:21 +00:00 |
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AMDGPUMachineModuleInfo.h
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AMDGPU: Add support for cross address space synchronization scopes
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2019-03-25 20:50:21 +00:00 |
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AMDGPUMacroFusion.cpp
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…
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AMDGPUMacroFusion.h
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…
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AMDGPUOpenCLEnqueuedBlockLowering.cpp
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Fix parameter name comments using clang-tidy. NFC.
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2019-07-16 04:46:31 +00:00 |
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AMDGPUPTNote.h
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…
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AMDGPUPerfHintAnalysis.cpp
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AMDGPU: Fix assert in clang test
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2019-07-05 21:09:53 +00:00 |
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AMDGPUPerfHintAnalysis.h
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AMDGPU: Make AMDGPUPerfHintAnalysis an SCC pass
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2019-07-05 20:26:13 +00:00 |
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AMDGPUPreLegalizerCombiner.cpp
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AMDGPU/GlobalISel: Add pre-legalize combiner pass
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2020-01-22 10:16:39 -05:00 |
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AMDGPUPrintfRuntimeBinding.cpp
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[AMDGPU] add support for hostcall buffer pointer as hidden kernel argument
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2019-11-20 15:53:55 +05:30 |
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AMDGPUPromoteAlloca.cpp
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[Alignement][NFC] Deprecate untyped CreateAlignedLoad
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2020-01-23 13:34:32 +01:00 |
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AMDGPUPropagateAttributes.cpp
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AMDGPU: Move DEBUG_TYPE definition below includes
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2019-07-08 18:48:39 +00:00 |
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AMDGPURegisterBankInfo.cpp
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AMDGPU/GlobalISel: Select llvm.amdgcn.raw.tbuffer.store
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2020-01-27 15:16:21 -05:00 |
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AMDGPURegisterBankInfo.h
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AMDPGPU/GlobalISel: Select more MUBUF global addressing modes
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2020-01-27 07:28:36 -08:00 |
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AMDGPURegisterBanks.td
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AMDGPU/GlobalISel: Replace handling of boolean values
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2020-01-06 18:26:42 -05:00 |
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AMDGPURegisterInfo.cpp
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AMDGPU: Remove outdated comment
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2020-01-16 14:54:27 -05:00 |
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AMDGPURegisterInfo.h
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AMDGPU/GlobalISel: Handle more G_INSERT cases
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2019-10-07 19:16:26 +00:00 |
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AMDGPURegisterInfo.td
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[AMDGPU] gfx908 register file changes
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2019-07-09 19:41:51 +00:00 |
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AMDGPURewriteOutArguments.cpp
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[Alignment][NFC] Use Align with CreateAlignedStore
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2020-01-23 17:34:32 +01:00 |
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AMDGPUSearchableTables.td
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[AMDGPU][SILoadStoreOptimizer] Merge TBUFFER loads/stores
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2019-11-20 22:59:30 +01:00 |
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AMDGPUSubtarget.cpp
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[AMDGPU] Bundle loads before post-RA scheduler
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2020-01-24 11:33:38 -08:00 |
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AMDGPUSubtarget.h
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[AMDGPU] allow multi-dword flat scratch access since GFX9
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2020-01-17 10:47:03 -08:00 |
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AMDGPUTargetMachine.cpp
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[AMDGPU] Bundle loads before post-RA scheduler
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2020-01-24 11:33:38 -08:00 |
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AMDGPUTargetMachine.h
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…
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AMDGPUTargetObjectFile.cpp
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…
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AMDGPUTargetObjectFile.h
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…
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AMDGPUTargetTransformInfo.cpp
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Resubmit: [DA][TTI][AMDGPU] Add option to select GPUDA with TTI
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2020-01-24 10:39:40 -08:00 |
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AMDGPUTargetTransformInfo.h
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Resubmit: [DA][TTI][AMDGPU] Add option to select GPUDA with TTI
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2020-01-24 10:39:40 -08:00 |
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AMDGPUUnifyDivergentExitNodes.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUUnifyMetadata.cpp
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[AMDGPU] Fixes -Wrange-loop-analysis warnings
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2019-12-22 19:39:28 +01:00 |
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AMDILCFGStructurizer.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDKernelCodeT.h
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[AMDGPU] gfx1010 wave32 metadata
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2019-06-17 16:48:56 +00:00 |
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BUFInstructions.td
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AMDGPU/GlobalISel: Select llvm.amdgcn.raw.tbuffer.store
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2020-01-27 15:16:21 -05:00 |
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CMakeLists.txt
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[AMDGPU] Bundle loads before post-RA scheduler
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2020-01-24 11:33:38 -08:00 |
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CaymanInstructions.td
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…
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DSInstructions.td
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TableGen/GlobalISel: Add way for SDNodeXForm to work on timm
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2020-01-09 17:37:52 -05:00 |
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EvergreenInstructions.td
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AMDGPU: Start redefining atomic PatFrags
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2019-08-01 03:25:52 +00:00 |
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FLATInstructions.td
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AMDGPU/GlobalISel: Fix not using global atomics on gfx9+
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2020-01-27 07:42:42 -08:00 |
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GCNDPPCombine.cpp
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[AMDGPU][DPP] Corrected DPP combiner
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2019-11-20 15:56:45 +03:00 |
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GCNHazardRecognizer.cpp
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Make more use of MachineInstr::mayLoadOrStore.
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2019-12-19 11:51:52 +00:00 |
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GCNHazardRecognizer.h
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[AMDGPU] gfx908 hazard recognizer
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2019-07-11 21:30:34 +00:00 |
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GCNILPSched.cpp
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Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each
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2019-10-19 01:31:09 +00:00 |
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GCNIterativeScheduler.cpp
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[llvm] Migrate llvm::make_unique to std::make_unique
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2019-08-15 15:54:37 +00:00 |
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GCNIterativeScheduler.h
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…
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GCNMinRegStrategy.cpp
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…
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GCNNSAReassign.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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GCNProcessors.td
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[AMDGPU] gfx908 target
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2019-07-09 18:10:06 +00:00 |
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GCNRegBankReassign.cpp
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AMDGPU: Fix ubsan error
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2020-01-23 15:05:47 -05:00 |
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GCNRegPressure.cpp
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[AMDGPU] Fix GCN regpressure trackers for INLINEASM instructions.
|
2020-01-27 17:25:25 +03:00 |
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GCNRegPressure.h
|
Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
|
2019-08-01 23:27:28 +00:00 |
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GCNSchedStrategy.cpp
|
[AMDGPU] Attempt to reschedule withou clustering
|
2020-01-27 10:27:16 -08:00 |
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GCNSchedStrategy.h
|
[AMDGPU] Attempt to reschedule withou clustering
|
2020-01-27 10:27:16 -08:00 |
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LLVMBuild.txt
|
[AMDGPU] Move InstPrinter files to MCTargetDesc. NFC
|
2019-05-11 00:03:35 +00:00 |
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MIMGInstructions.td
|
[AMDGPU] deduplicate tablegen predicates
|
2019-11-04 12:19:17 -08:00 |
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R600.td
|
…
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|
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R600AsmPrinter.cpp
|
[NFC] Fix trivial typos in comments
|
2020-01-06 10:50:26 +00:00 |
|
R600AsmPrinter.h
|
…
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|
|
R600ClauseMergePass.cpp
|
…
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|
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R600ControlFlowFinalizer.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
|
R600Defines.h
|
…
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R600EmitClauseMarkers.cpp
|
…
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R600ExpandSpecialInstrs.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
|
R600FrameLowering.cpp
|
…
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|
|
R600FrameLowering.h
|
[Alignment][NFC] Deprecate Align::None()
|
2020-01-24 12:53:58 +01:00 |
|
R600ISelLowering.cpp
|
[DAG] Add helper for creating constant vector index with correct type. NFC.
|
2020-01-18 01:23:36 -05:00 |
|
R600ISelLowering.h
|
[TargetLowering] Add MachineMemOperand::Flags to allowsMemoryAccess tests (PR42123)
|
2019-06-12 17:14:03 +00:00 |
|
R600InstrFormats.td
|
…
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|
|
R600InstrInfo.cpp
|
Update spelling of {analyze,insert,remove}Branch in strings and comments
|
2020-01-21 10:15:38 -06:00 |
|
R600InstrInfo.h
|
Use MCRegister in copyPhysReg
|
2019-11-11 14:42:33 +05:30 |
|
R600Instructions.td
|
AMDGPU: Eliminate more legacy codepred address space PatFrags
|
2020-01-09 10:29:32 -05:00 |
|
R600MachineFunctionInfo.cpp
|
…
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|
|
R600MachineFunctionInfo.h
|
…
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|
|
R600MachineScheduler.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
|
R600MachineScheduler.h
|
…
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|
|
R600OpenCLImageTypeLoweringPass.cpp
|
…
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|
|
R600OptimizeVectorRegisters.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
|
R600Packetizer.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
|
R600Processors.td
|
AMDGPU: Fix names for generation features
|
2019-04-03 00:01:03 +00:00 |
|
R600RegisterInfo.cpp
|
Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
|
2019-08-01 23:27:28 +00:00 |
|
R600RegisterInfo.h
|
[TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true
|
2020-01-19 14:20:37 -08:00 |
|
R600RegisterInfo.td
|
…
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|
|
R600Schedule.td
|
…
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|
|
R700Instructions.td
|
…
|
|
|
SIAddIMGInit.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
|
SIAnnotateControlFlow.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIDefines.h
|
[AMDGPU] Added MI bit IsDOT
|
2019-09-17 17:56:13 +00:00 |
|
SIFixSGPRCopies.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIFixVGPRCopies.cpp
|
…
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|
|
SIFixupVectorISel.cpp
|
Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
|
2019-08-01 23:27:28 +00:00 |
|
SIFoldOperands.cpp
|
[amdgpu] Remove unused header. NFC.
|
2020-01-08 11:32:09 -05:00 |
|
SIFormMemoryClauses.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIFrameLowering.cpp
|
[AMDGPU] Don't create MachinePointerInfos with an UndefValue pointer
|
2019-12-23 15:58:19 +00:00 |
|
SIFrameLowering.h
|
[Alignment][NFC] Deprecate Align::None()
|
2020-01-24 12:53:58 +01:00 |
|
SIISelLowering.cpp
|
AMDGPU: Fix not using f16 fsin/fcos
|
2020-01-27 08:59:59 -08:00 |
|
SIISelLowering.h
|
CodeGen: Use LLT instead of EVT in getRegisterByName
|
2020-01-09 17:37:52 -05:00 |
|
SIInsertSkips.cpp
|
Resubmit: [AMDGPU] Invert the handling of skip insertion.
|
2020-01-22 13:18:32 +09:00 |
|
SIInsertWaitcnts.cpp
|
[AMDGPU] need to insert wait between the scalar load and vector store to the same address to avoid WAR conflict.
|
2020-01-04 18:23:14 +03:00 |
|
SIInstrFormats.td
|
[AMDGPU] Added MI bit IsDOT
|
2019-09-17 17:56:13 +00:00 |
|
SIInstrInfo.cpp
|
[AMDGPU] Handle multiple base operands in areMemAccessesTriviallyDisjoint
|
2020-01-27 14:45:21 +00:00 |
|
SIInstrInfo.h
|
AMDGPU/GlobalISel: Select G_INSERT_VECTOR_ELT
|
2020-01-22 11:00:49 -05:00 |
|
SIInstrInfo.td
|
AMDGPU/GlobalISel: Select llvm.amdgcn.raw.tbuffer.load
|
2020-01-27 13:40:37 -05:00 |
|
SIInstructions.td
|
AMDGPU/GlobalISel: Move llvm.amdgcn.raw.buffer.store handling
|
2020-01-27 14:59:30 -05:00 |
|
SILoadStoreOptimizer.cpp
|
AMDGPU/SILoadStoreOptimizer: Fix uninitialized variable error
|
2020-01-24 21:53:05 -08:00 |
|
SILowerControlFlow.cpp
|
Resubmit: [AMDGPU] Invert the handling of skip insertion.
|
2020-01-22 13:18:32 +09:00 |
|
SILowerI1Copies.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SILowerSGPRSpills.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIMachineFunctionInfo.cpp
|
AMDGPU: Refactor treatment of denormal mode
|
2019-11-19 19:55:43 +05:30 |
|
SIMachineFunctionInfo.h
|
AMDGPU: Refactor treatment of denormal mode
|
2019-11-19 19:55:43 +05:30 |
|
SIMachineScheduler.cpp
|
AMDGPU/SI: make ~SIScheduleBlockCreator trivial
|
2019-11-11 21:51:59 -08:00 |
|
SIMachineScheduler.h
|
AMDGPU/SI: make ~SIScheduleBlockCreator trivial
|
2019-11-11 21:51:59 -08:00 |
|
SIMemoryLegalizer.cpp
|
[AMDGPU] Bundle loads before post-RA scheduler
|
2020-01-24 11:33:38 -08:00 |
|
SIModeRegister.cpp
|
[llvm] Migrate llvm::make_unique to std::make_unique
|
2019-08-15 15:54:37 +00:00 |
|
SIOptimizeExecMasking.cpp
|
AMDGPU: Use Register
|
2019-12-27 16:53:21 -05:00 |
|
SIOptimizeExecMaskingPreRA.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIPeepholeSDWA.cpp
|
AMDGPU: Fixed indeterminate map iteration in SIPeepholeSDWA
|
2019-12-02 12:08:49 +00:00 |
|
SIPostRABundler.cpp
|
[AMDGPU] Bundle loads before post-RA scheduler
|
2020-01-24 11:33:38 -08:00 |
|
SIPreAllocateWWMRegs.cpp
|
Sink all InitializePasses.h includes
|
2019-11-13 16:34:37 -08:00 |
|
SIProgramInfo.h
|
[AMDGPU] separate accounting for agprs
|
2019-10-02 00:26:58 +00:00 |
|
SIRegisterInfo.cpp
|
[TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true
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2020-01-19 14:20:37 -08:00 |
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SIRegisterInfo.h
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[TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true
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2020-01-19 14:20:37 -08:00 |
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SIRegisterInfo.td
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AMDGPU: Make VReg_1 only include 1 artificial register
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2019-10-28 20:51:51 -07:00 |
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SIRemoveShortExecBranches.cpp
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[AMDGPU] SIRemoveShortExecBranches should not remove branches exiting loops
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2020-01-22 13:18:40 +09:00 |
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SISchedule.td
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[AMDGPU] gfx908 scheduling
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2019-07-11 21:25:00 +00:00 |
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SIShrinkInstructions.cpp
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AMDGPU: Don't fold S_NOPs with implicit operands
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2019-10-30 14:40:56 -07:00 |
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SIWholeQuadMode.cpp
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[AMDGPU] Remove unnecessary v_mov from a register to itself in WQM lowering.
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2020-01-10 23:01:19 -05:00 |
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SMInstructions.td
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[AMDGPU] deduplicate tablegen predicates
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2019-11-04 12:19:17 -08:00 |
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SOPInstructions.td
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Revert "AMDGPU: Temporary drop s_mul_hi_i/u32 patterns"
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2020-01-27 08:07:21 -08:00 |
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VIInstrFormats.td
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…
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VIInstructions.td
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…
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VOP1Instructions.td
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AMDGPU/GlobalISel: Select llvm.amdgcn.mov.dpp
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2020-01-22 11:43:53 -05:00 |
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VOP2Instructions.td
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AMDGPU/GlobalISel: Fix import of zext of s16 op patterns
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2020-01-09 10:29:32 -05:00 |
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VOP3Instructions.td
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AMDGPU/GlobalISel: Select V_ADD3_U32/V_XOR3_B32
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2020-01-23 12:04:20 -05:00 |
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VOP3PInstructions.td
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[AMDGPU] deduplicate tablegen predicates
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2019-11-04 12:19:17 -08:00 |
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VOPCInstructions.td
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AMDGPU: Remove VOP3Mods0Clamp0OMod
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2020-01-07 15:10:08 -05:00 |
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VOPInstructions.td
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[AMDGPU] copy OtherPredicates from pseudo to VOP3_Real
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2019-09-26 21:06:17 +00:00 |
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