Brendon Cahoon 6f35837048 Use TSFlag bit to describe instruction properties. ... Creating the isPredicated TSFlag enables the code to use the property defined in the instruction format instead of using a large switch statement. llvm-svn: 150078		2012-02-08 18:25:47 +00:00
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Analysis	Add support for a temporary forward decl type. We want this so we	2012-02-08 00:22:26 +00:00
Archive	Avoid using an invalidated iterator.	2012-01-23 05:07:16 +00:00
AsmParser	Convert assert(0) to llvm_unreachable	2012-02-07 05:05:23 +00:00
Bitcode	Enable streaming of bitcode	2012-02-06 22:30:29 +00:00
CodeGen	Keep track of register masks in LiveIntervalAnalysis.	2012-02-08 17:33:45 +00:00
DebugInfo	More dead code removal (using -Wunreachable-code)	2012-01-20 21:51:11 +00:00
ExecutionEngine	Convert assert(0) to llvm_unreachable	2012-02-07 05:05:23 +00:00
Linker	Convert assert(0) to llvm_unreachable	2012-02-07 05:05:23 +00:00
MC	Convert assert(0) to llvm_unreachable	2012-02-07 05:05:23 +00:00
Object	Object: avoid undefined behavior when bounds-checking	2012-02-04 02:41:39 +00:00
Support	PathV2: Remove static StringRef ctors.	2012-02-08 13:13:47 +00:00
TableGen	Convert assert(0) to llvm_unreachable	2012-02-07 05:05:23 +00:00
Target	Use TSFlag bit to describe instruction properties.	2012-02-08 18:25:47 +00:00
Transforms	Use Use::set rather than finding the operand number of the use	2012-02-08 14:10:53 +00:00
VMCore	Cache the sizes of vectors instead of calculating them all over the place.	2012-02-07 01:48:12 +00:00
CMakeLists.txt	Move TableGen's parser and entry point into a library	2011-10-01 16:41:13 +00:00
LLVMBuild.txt	LLVMBuild: Introduce a common section which currently has a list of the	2011-12-12 22:45:54 +00:00
Makefile	Remove more of llvmc and dependencies.	2011-09-20 00:34:27 +00:00