forked from OSchip/llvm-project
54 lines
2.9 KiB
MLIR
54 lines
2.9 KiB
MLIR
// RUN: mlir-opt -legalize-std-for-spirv -convert-std-to-spirv %s -o - | FileCheck %s
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// TODO: For these examples running these passes separately produces
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// the desired output. Adding all of patterns within a single pass does
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// not seem to work.
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//===----------------------------------------------------------------------===//
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// std.subview
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//===----------------------------------------------------------------------===//
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// CHECK-LABEL: @fold_static_stride_subview_with_load
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// CHECK-SAME: [[ARG0:%.*]]: !spv.ptr<!spv.struct<!spv.array<384 x f32 [4]> [0]>, StorageBuffer>, [[ARG1:%.*]]: i32, [[ARG2:%.*]]: i32, [[ARG3:%.*]]: i32, [[ARG4:%.*]]: i32
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func @fold_static_stride_subview_with_load(%arg0 : memref<12x32xf32>, %arg1 : index, %arg2 : index, %arg3 : index, %arg4 : index) {
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// CHECK: [[C2:%.*]] = spv.constant 2
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// CHECK: [[C3:%.*]] = spv.constant 3
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// CHECK: [[T2:%.*]] = spv.IMul [[ARG3]], [[C2]]
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// CHECK: [[T3:%.*]] = spv.IAdd [[ARG1]], [[T2]]
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// CHECK: [[T4:%.*]] = spv.IMul [[ARG4]], [[C3]]
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// CHECK: [[T5:%.*]] = spv.IAdd [[ARG2]], [[T4]]
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// CHECK: [[C32:%.*]] = spv.constant 32
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// CHECK: [[T7:%.*]] = spv.IMul [[C32]], [[T3]]
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// CHECK: [[C1:%.*]] = spv.constant 1
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// CHECK: [[T9:%.*]] = spv.IMul [[C1]], [[T5]]
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// CHECK: [[T10:%.*]] = spv.IAdd [[T7]], [[T9]]
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// CHECK: [[C0:%.*]] = spv.constant 0
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// CHECK: [[T12:%.*]] = spv.AccessChain [[ARG0]]{{\[}}[[C0]], [[T10]]
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// CHECK: spv.Load "StorageBuffer" [[T12]] : f32
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%0 = subview %arg0[%arg1, %arg2][][] : memref<12x32xf32> to memref<4x4xf32, offset:?, strides: [64, 3]>
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%1 = load %0[%arg3, %arg4] : memref<4x4xf32, offset:?, strides: [64, 3]>
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return
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}
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// CHECK-LABEL: @fold_static_stride_subview_with_store
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// CHECK-SAME: [[ARG0:%.*]]: !spv.ptr<!spv.struct<!spv.array<384 x f32 [4]> [0]>, StorageBuffer>, [[ARG1:%.*]]: i32, [[ARG2:%.*]]: i32, [[ARG3:%.*]]: i32, [[ARG4:%.*]]: i32, [[ARG5:%.*]]: f32
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func @fold_static_stride_subview_with_store(%arg0 : memref<12x32xf32>, %arg1 : index, %arg2 : index, %arg3 : index, %arg4 : index, %arg5 : f32) {
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// CHECK: [[C2:%.*]] = spv.constant 2
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// CHECK: [[C3:%.*]] = spv.constant 3
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// CHECK: [[T2:%.*]] = spv.IMul [[ARG3]], [[C2]]
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// CHECK: [[T3:%.*]] = spv.IAdd [[ARG1]], [[T2]]
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// CHECK: [[T4:%.*]] = spv.IMul [[ARG4]], [[C3]]
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// CHECK: [[T5:%.*]] = spv.IAdd [[ARG2]], [[T4]]
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// CHECK: [[C32:%.*]] = spv.constant 32
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// CHECK: [[T7:%.*]] = spv.IMul [[C32]], [[T3]]
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// CHECK: [[C1:%.*]] = spv.constant 1
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// CHECK: [[T9:%.*]] = spv.IMul [[C1]], [[T5]]
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// CHECK: [[T10:%.*]] = spv.IAdd [[T7]], [[T9]]
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// CHECK: [[C0:%.*]] = spv.constant 0
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// CHECK: [[T12:%.*]] = spv.AccessChain [[ARG0]]{{\[}}[[C0]], [[T10]]
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// CHECK: spv.Store "StorageBuffer" [[T12]], [[ARG5]] : f32
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%0 = subview %arg0[%arg1, %arg2][][] : memref<12x32xf32> to memref<4x4xf32, offset:?, strides: [64, 3]>
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store %arg5, %0[%arg3, %arg4] : memref<4x4xf32, offset:?, strides: [64, 3]>
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return
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}
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