llvm-project/llvm/lib/Target/Hexagon
Benjamin Kramer 4d9d2cc77f [Hexagon] Create global std::map lazily.
This could of course be a simple binary search with no global state
involved at all if someone cares enough. Just don't make everyone
linking the hexagon backend pay for it on process startup and shutdown.

llvm-svn: 274437
2016-07-02 13:05:12 +00:00
..
AsmParser Delete more dead code. 2016-06-21 21:51:41 +00:00
Disassembler [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
MCTargetDesc [Hexagon] Create global std::map lazily. 2016-07-02 13:05:12 +00:00
TargetInfo Remove autoconf support 2016-01-26 21:29:08 +00:00
BitTracker.cpp Avoid copies of std::strings and APInt/APFloats where we only read from it 2016-06-08 10:01:20 +00:00
BitTracker.h
CMakeLists.txt Touch Hexagon/CMakeLists.txt to regenerate build files, since r268641 complains of missing HexagonAlias.td on ninja. 2016-05-05 19:28:01 +00:00
Hexagon.h [Hexagon] Improve lowering of instructions to the MC layer 2015-12-02 23:08:29 +00:00
Hexagon.td [Hexagon] Merge HexagonAlias.td into HexagonInstrAlias.td, NFC 2016-05-05 16:19:36 +00:00
HexagonAsmPrinter.cpp [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
HexagonAsmPrinter.h [Hexagon] Preprocess mapped instructions before lowering to MC 2015-12-15 17:05:45 +00:00
HexagonBitSimplify.cpp Delete more dead code. 2016-06-21 21:51:41 +00:00
HexagonBitTracker.cpp CodeGen: TII: Take MachineInstr& in predicate API, NFC 2016-02-23 02:46:52 +00:00
HexagonBitTracker.h
HexagonBlockRanges.cpp [hexagon] Move BlockRanges and RDF stuff into the llvm namespace. 2016-05-27 10:06:40 +00:00
HexagonBlockRanges.h [hexagon] Move BlockRanges and RDF stuff into the llvm namespace. 2016-05-27 10:06:40 +00:00
HexagonBranchRelaxation.cpp [Hexagon] Implement branch relaxation 2016-04-19 18:30:18 +00:00
HexagonCFGOptimizer.cpp Use the standard INITIALIZE_PASS macro rather than hand rolling a (not 2016-06-03 10:13:29 +00:00
HexagonCallingConv.td
HexagonCommonGEP.cpp [scan-build] fix dead store warnings emitted on LLVM Hexagon code base 2016-05-13 13:13:59 +00:00
HexagonCopyToCombine.cpp Add MachineFunctionProperty checks for AllVRegsAllocated for target passes 2016-04-04 17:09:25 +00:00
HexagonEarlyIfConv.cpp Run clang-tidy's performance-unnecessary-copy-initialization over LLVM. 2016-06-12 17:30:47 +00:00
HexagonExpandCondsets.cpp [Hexagon] Revert r274381: that was actually wrong 2016-07-01 20:45:19 +00:00
HexagonFixupHwLoops.cpp [scan-build] fix dead store warnings emitted on LLVM Hexagon code base 2016-05-13 13:13:59 +00:00
HexagonFrameLowering.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
HexagonFrameLowering.h [Hexagon] Enable the post-RA scheduler 2016-05-26 19:44:28 +00:00
HexagonGenExtract.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonGenInsert.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonGenMux.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonGenPredicate.cpp Apply clang-tidy's misc-static-assert where it makes sense. 2016-05-27 11:36:04 +00:00
HexagonHardwareLoops.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
HexagonISelDAGToDAG.cpp [Hexagon] Equally-sized vectors are equivalent in ISel (except vNi1) 2016-06-27 15:08:22 +00:00
HexagonISelLowering.cpp CodeGen: Use MachineInstr& in TargetLowering, NFC 2016-06-30 22:52:52 +00:00
HexagonISelLowering.h CodeGen: Use MachineInstr& in TargetLowering, NFC 2016-06-30 22:52:52 +00:00
HexagonInstrAlias.td [Hexagon] Treat all conditional branches as predicted (not-taken by default) 2016-05-09 18:22:07 +00:00
HexagonInstrEnc.td [Hexagon] Adding skeleton of HVX extension instructions. 2015-10-17 01:33:04 +00:00
HexagonInstrFormats.td [Hexagon] Remove the remnants of isConstExtProfitable 2015-10-20 19:04:53 +00:00
HexagonInstrFormatsV4.td [Hexagon] Update instruction formats 2015-11-23 14:09:26 +00:00
HexagonInstrFormatsV60.td [Hexagon] Update instruction formats 2015-11-23 14:09:26 +00:00
HexagonInstrInfo.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
HexagonInstrInfo.h CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
HexagonInstrInfo.td [Hexagon] Treat all conditional branches as predicted (not-taken by default) 2016-05-09 18:22:07 +00:00
HexagonInstrInfoV3.td [Hexagon] Register save/restore functions do not follow regular conventions 2016-04-25 17:49:44 +00:00
HexagonInstrInfoV4.td [Hexagon] Register save/restore functions do not follow regular conventions 2016-04-25 17:49:44 +00:00
HexagonInstrInfoV5.td [Hexagon] Treat transfers of FP immediates are pseudo instructions 2015-11-25 21:40:03 +00:00
HexagonInstrInfoV60.td [Hexagon] Improve handling of unaligned vector loads and stores 2016-03-28 15:43:03 +00:00
HexagonInstrInfoVector.td [Hexagon] Equally-sized vectors are equivalent in ISel (except vNi1) 2016-06-27 15:08:22 +00:00
HexagonIntrinsics.td [Hexagon] Handle operand type differences for A2_tfrpi 2016-05-05 15:29:47 +00:00
HexagonIntrinsicsDerived.td
HexagonIntrinsicsV3.td
HexagonIntrinsicsV4.td [Hexagon] Use common Pat classes for selecting code for intrinsics 2016-04-22 18:05:55 +00:00
HexagonIntrinsicsV5.td [Hexagon] Use common Pat classes for selecting code for intrinsics 2016-04-22 18:05:55 +00:00
HexagonIntrinsicsV60.td [Hexagon] Use common Pat classes for selecting code for intrinsics 2016-04-22 18:05:55 +00:00
HexagonIsetDx.td
HexagonMCInstLower.cpp [Hexagon] Using MustExtend flag on expression instead of passing around bools. 2016-02-29 18:39:51 +00:00
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h [Hexagon] Speed up frame lowering when no optimizations are enabled 2016-03-28 14:42:03 +00:00
HexagonMachineScheduler.cpp CodeGen: Update DFAPacketizer API to take MachineInstr&, NFC 2016-02-27 19:09:00 +00:00
HexagonMachineScheduler.h [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
HexagonNewValueJump.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonOperands.td [Hexagon] Adding relocation for code size, cold path optimization allowing a 23-bit 4-byte aligned relocation to be a valid instruction encoding. 2016-02-16 20:38:17 +00:00
HexagonOptAddrMode.cpp Delete more dead code. 2016-06-21 21:51:41 +00:00
HexagonOptimizeSZextends.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonPeephole.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonRDF.cpp [Hexagon] Implement RDF-based post-RA optimizations 2016-01-12 19:09:01 +00:00
HexagonRDF.h [hexagon] Move BlockRanges and RDF stuff into the llvm namespace. 2016-05-27 10:06:40 +00:00
HexagonRDFOpt.cpp [RDF] Add option to keep dead phi nodes in DFG 2016-04-28 20:17:06 +00:00
HexagonRegisterInfo.cpp Run clang-tidy's performance-unnecessary-copy-initialization over LLVM. 2016-06-12 17:30:47 +00:00
HexagonRegisterInfo.h [Hexagon] Make getCallerSavedRegs specific to a register class 2016-05-16 18:02:28 +00:00
HexagonRegisterInfo.td [Hexagon] Separate C8 and USR to avoid unwanted subregister composition 2016-05-28 01:51:16 +00:00
HexagonSchedule.td [Hexagon] Update instruction formats 2015-11-23 14:09:26 +00:00
HexagonScheduleV4.td TableGen: Check scheduling models for completeness 2016-03-01 20:03:21 +00:00
HexagonScheduleV55.td TableGen: Check scheduling models for completeness 2016-03-01 20:03:21 +00:00
HexagonScheduleV60.td TableGen: Check scheduling models for completeness 2016-03-01 20:03:21 +00:00
HexagonSelectCCInfo.td
HexagonSelectionDAGInfo.cpp [SDAG] Remove FixedArgs parameter from CallLoweringInfo::setCallee 2016-06-22 12:54:25 +00:00
HexagonSelectionDAGInfo.h Pass DebugLoc and SDLoc by const ref. 2016-06-12 15:39:02 +00:00
HexagonSplitConst32AndConst64.cpp [Hexagon] Expand handling of the small-data/bss section 2016-04-21 18:56:45 +00:00
HexagonSplitDouble.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
HexagonStoreWidening.cpp Add optimization bisect opt-in calls for Hexagon passes 2016-04-26 19:46:28 +00:00
HexagonSubtarget.cpp [Hexagon] Add option to enable subregister liveness tracking 2016-05-28 02:02:51 +00:00
HexagonSubtarget.h [Hexagon] Add option to enable subregister liveness tracking 2016-05-28 02:02:51 +00:00
HexagonSystemInst.td [Hexagon] Add definitions for trap/pause instructions 2016-04-22 16:25:00 +00:00
HexagonTargetMachine.cpp [Hexagon] Do not create passes in the constructor of HexagonPassConfig 2016-05-27 20:48:39 +00:00
HexagonTargetMachine.h Delete Reloc::Default. 2016-05-18 22:04:49 +00:00
HexagonTargetObjectFile.cpp [Hexagon] Expand handling of the small-data/bss section 2016-04-21 18:56:45 +00:00
HexagonTargetObjectFile.h [Hexagon] Expand handling of the small-data/bss section 2016-04-21 18:56:45 +00:00
HexagonTargetStreamer.h
HexagonTargetTransformInfo.cpp
HexagonTargetTransformInfo.h constify the Function parameter to the TTI creation callback and 2015-09-16 23:38:13 +00:00
HexagonVLIWPacketizer.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
HexagonVLIWPacketizer.h CodeGen: Update DFAPacketizer API to take MachineInstr&, NFC 2016-02-27 19:09:00 +00:00
LLVMBuild.txt [Hexagon] Adding LLVMBuild.txt reference to HexagonAsmParser. 2015-11-09 04:31:02 +00:00
RDFCopy.cpp [hexagon] Move BlockRanges and RDF stuff into the llvm namespace. 2016-05-27 10:06:40 +00:00
RDFCopy.h [hexagon] Move BlockRanges and RDF stuff into the llvm namespace. 2016-05-27 10:06:40 +00:00
RDFDeadCode.cpp [RDF] Improve compile-time performance of dead code elimination 2016-01-18 20:42:47 +00:00
RDFDeadCode.h [hexagon] Move BlockRanges and RDF stuff into the llvm namespace. 2016-05-27 10:06:40 +00:00
RDFGraph.cpp [hexagon] Move BlockRanges and RDF stuff into the llvm namespace. 2016-05-27 10:06:40 +00:00
RDFGraph.h [hexagon] Move BlockRanges and RDF stuff into the llvm namespace. 2016-05-27 10:06:40 +00:00
RDFLiveness.cpp [RDF] Ignore implicit defs when resetting <kill> flags 2016-06-02 14:30:09 +00:00
RDFLiveness.h [hexagon] Move BlockRanges and RDF stuff into the llvm namespace. 2016-05-27 10:06:40 +00:00