llvm-project/llvm/lib/CodeGen
Reid Kleckner 45a7462094 [codeview] Use the first valid source location at the top of every MBB
If the instructions at the beginning of the block have no location,
we're better off using the location of the first instruction in the
current basic block. At the very least, that instruction post-dominates
this one, whereas if we don't emit a .cv_loc directive, we end up using
the potentially invalid location that falls through from the previous
block.

We could probably do better here by emitting some kind of ".cv_loc end"
directive that stops the line table entry of the previous .cv_loc
directive from bleeding out of its basic block. This would improve the
line table when an entire MBB has no valid location info.

llvm-svn: 306889
2017-06-30 21:33:44 +00:00
..
AsmPrinter [codeview] Use the first valid source location at the top of every MBB 2017-06-30 21:33:44 +00:00
GlobalISel GlobalISel: add G_IMPLICIT_DEF instruction. 2017-06-30 20:27:36 +00:00
MIRParser fix trivial typos, NFC 2017-06-27 10:35:37 +00:00
SelectionDAG Revert "[DAG] Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset" 2017-06-30 12:56:02 +00:00
AggressiveAntiDepBreaker.cpp [AntiDepBreaker] Revert r299124 and add a test. 2017-05-30 22:26:52 +00:00
AggressiveAntiDepBreaker.h
AllocationOrder.cpp
AllocationOrder.h
Analysis.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
AntiDepBreaker.h Resubmit r301309: [DebugInfo][X86] Fix handling of DBG_VALUE's in post-RA scheduler. 2017-04-25 15:39:57 +00:00
AtomicExpandPass.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
BasicTargetTransformInfo.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
BranchCoalescing.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
BranchFolding.cpp Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue" 2017-06-29 13:58:24 +00:00
BranchFolding.h LivePhysRegs: Skip reserved regs in computeLiveIns; NFCI 2017-05-26 06:32:31 +00:00
BranchRelaxation.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
BuiltinGCs.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
CMakeLists.txt Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue" 2017-06-29 13:58:24 +00:00
CalcSpillWeights.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
CallingConvLower.cpp [CodeGen] Remove dead call-or-prologue enum from CCState 2017-02-02 21:58:22 +00:00
CodeGen.cpp Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue" 2017-06-29 13:58:24 +00:00
CodeGenPrepare.cpp [CodeGenPrepare] Don't create inttoptr for ni ptrs 2017-06-29 20:28:59 +00:00
CountingFunctionInserter.cpp Module::getOrInsertFunction is using C-style vararg instead of variadic templates. 2017-04-11 15:01:18 +00:00
CriticalAntiDepBreaker.cpp [AntiDepBreaker] Revert r299124 and add a test. 2017-05-30 22:26:52 +00:00
CriticalAntiDepBreaker.h
DFAPacketizer.cpp [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-06-07 23:53:32 +00:00
DeadMachineInstructionElim.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
DetectDeadLanes.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
DwarfEHPrepare.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
EarlyIfConversion.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
EdgeBundles.cpp
ExecutionDepsFix.cpp [ExecutionDepsFix] Don't recurse over the CFG 2017-04-05 17:42:56 +00:00
ExpandISelPseudos.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
ExpandPostRAPseudos.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
ExpandReductions.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
FEntryInserter.cpp [X86] Implement -mfentry 2017-01-31 17:00:27 +00:00
FaultMaps.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
FuncletLayout.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
GCMetadata.cpp [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-06-07 23:53:32 +00:00
GCMetadataPrinter.cpp [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-06-07 23:53:32 +00:00
GCRootLowering.cpp
GCStrategy.cpp [CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2017-02-27 22:45:06 +00:00
GlobalMerge.cpp Add support for #pragma clang section 2017-06-05 10:09:13 +00:00
IfConversion.cpp [IfConversion] Hoist removeBranch calls out of if/else clauses [NFC] 2017-06-26 09:33:04 +00:00
ImplicitNullChecks.cpp [ImplicitNullChecks] Uphold an invariant in areMemoryOpsAliased 2017-06-21 06:38:23 +00:00
InlineSpiller.cpp [InlineSpiller] Only account for real spills in the hoisting logic 2017-06-07 00:22:07 +00:00
InterferenceCache.cpp
InterferenceCache.h
InterleavedAccessPass.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
IntrinsicLowering.cpp Module::getOrInsertFunction is using C-style vararg instead of variadic templates. 2017-04-11 15:01:18 +00:00
LLVMBuild.txt LLVMCodeGen: Add ProfileData into deps corresponding to r300277. 2017-04-14 00:36:06 +00:00
LLVMTargetMachine.cpp sink DebugCompressionType into MC for exposing to clang 2017-06-09 00:40:19 +00:00
LatencyPriorityQueue.cpp
LazyMachineBlockFrequencyInfo.cpp [LazyMachineBFI] Reimplement with getAnalysisIfAvailable 2017-02-23 17:30:01 +00:00
LexicalScopes.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
LiveDebugValues.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
LiveDebugVariables.cpp Mark dump() methods as const. NFC 2017-06-21 22:19:17 +00:00
LiveDebugVariables.h Mark dump() methods as const. NFC 2017-06-21 22:19:17 +00:00
LiveInterval.cpp RegisterCoalescer: Simplify subrange splitting code; NFC 2017-03-03 19:05:34 +00:00
LiveIntervalAnalysis.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
LiveIntervalUnion.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
LivePhysRegs.cpp LiveRegUnits: Port recent LivePhysRegs bugfixes 2017-06-03 00:26:35 +00:00
LiveRangeCalc.cpp Rangify loops, formatting changes, use bool instead of unsigned, NFC 2017-06-28 16:02:00 +00:00
LiveRangeCalc.h LiveRangeCalc: Slightly improve map usage; NFC 2017-06-27 18:05:26 +00:00
LiveRangeEdit.cpp [LiveRangeEdit] Don't mess up with LiveInterval when a new vreg is created. 2017-02-02 20:44:36 +00:00
LiveRangeShrink.cpp Add LiveRangeShrink pass to shrink live range within BB. 2017-05-31 23:25:25 +00:00
LiveRangeUtils.h
LiveRegMatrix.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
LiveRegUnits.cpp LiveRegUnits: Port recent LivePhysRegs bugfixes 2017-06-03 00:26:35 +00:00
LiveStackAnalysis.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
LiveVariables.cpp [LiveVariables] Switch Kill/Defs sets to be DenseSet(s). 2017-05-11 19:37:43 +00:00
LocalStackSlotAllocation.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
LowLevelType.cpp [GlobalISel] Support vector-of-pointers in LLT 2017-04-19 07:23:57 +00:00
LowerEmuTLS.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
MIRPrinter.cpp [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-06-06 22:22:41 +00:00
MIRPrintingPass.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
MachineBasicBlock.cpp Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue" 2017-06-29 13:58:24 +00:00
MachineBlockFrequencyInfo.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
MachineBlockPlacement.cpp This reverts commit r306272. 2017-06-26 06:51:45 +00:00
MachineBranchProbabilityInfo.cpp
MachineCSE.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
MachineCombiner.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
MachineCopyPropagation.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
MachineDominanceFrontier.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
MachineDominators.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
MachineFrameInfo.cpp ARM: Compute MaxCallFrame size early 2017-05-05 22:04:05 +00:00
MachineFunction.cpp CodeGen: Refactor MIR parsing 2017-06-06 00:44:35 +00:00
MachineFunctionPass.cpp CodeGen: Refactor MIR parsing 2017-06-06 00:44:35 +00:00
MachineFunctionPrinterPass.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
MachineInstr.cpp Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue" 2017-06-29 13:58:24 +00:00
MachineInstrBundle.cpp
MachineLICM.cpp [MachineLICM] Hoist TOC-based address instructions 2017-06-15 18:29:59 +00:00
MachineLoopInfo.cpp New OptimizationRemarkEmitter pass for MIR 2017-01-25 23:20:33 +00:00
MachineModuleInfo.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
MachineModuleInfoImpls.cpp [WebAssembly] Use __stack_pointer global when writing wasm binary 2017-06-16 23:59:10 +00:00
MachineOptimizationRemarkEmitter.cpp [ORE] Unify spelling as "diagnostics hotness" 2017-06-30 18:13:59 +00:00
MachineOutliner.cpp CodeGen: Refactor MIR parsing 2017-06-06 00:44:35 +00:00
MachinePassRegistry.cpp
MachinePipeliner.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
MachinePostDominators.cpp
MachineRegionInfo.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
MachineRegisterInfo.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
MachineSSAUpdater.cpp
MachineScheduler.cpp Mark dump() methods as const. NFC 2017-06-21 22:19:17 +00:00
MachineSink.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
MachineTraceMetrics.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
MachineVerifier.cpp RegAllocPBQP: Do not assign reserved physical register 2017-06-08 21:30:54 +00:00
MacroFusion.cpp [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-06-26 22:44:03 +00:00
OptimizePHIs.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
PHIElimination.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
PHIEliminationUtils.cpp
PHIEliminationUtils.h
ParallelCG.cpp Bitcode: Change module reader functions to return an llvm::Expected. 2016-11-13 07:00:17 +00:00
PatchableFunction.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
PeepholeOptimizer.cpp Remove redundant copy in recurrences 2017-06-29 23:11:24 +00:00
PostRAHazardRecognizer.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
PostRASchedulerList.cpp ScheduleDAGInstrs: Fix fixupKills() 2017-05-27 02:50:50 +00:00
PreISelIntrinsicLowering.cpp
ProcessImplicitDefs.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
PrologEpilogInserter.cpp Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue" 2017-06-29 13:58:24 +00:00
PseudoSourceValue.cpp Fix crashing on TargetCustom PseudoSourceValues 2017-03-28 20:33:12 +00:00
README.txt
RegAllocBase.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
RegAllocBase.h Timer: Track name and description. 2016-11-18 19:43:18 +00:00
RegAllocBasic.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
RegAllocFast.cpp Move size and alignment information of regclass to TargetRegisterInfo 2017-04-24 18:55:33 +00:00
RegAllocGreedy.cpp fix trivial typo, NFC 2017-06-29 18:03:28 +00:00
RegAllocPBQP.cpp RegAllocPBQP: Do not assign reserved physical register 2017-06-08 21:30:54 +00:00
RegUsageInfoCollector.cpp [IPRA] Change algorithm for RegUsageInfoCollector. 2017-03-13 21:42:53 +00:00
RegUsageInfoPropagate.cpp
RegisterClassInfo.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
RegisterCoalescer.cpp LiveIntervalAnalysis: Fix missing case in pruneSubRegValues() 2017-05-19 00:18:03 +00:00
RegisterCoalescer.h
RegisterPressure.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
RegisterScavenging.cpp RegisterScavenging: Followup to r305625 2017-06-20 18:43:14 +00:00
RegisterUsageInfo.cpp Fix typos 2017-06-19 21:54:25 +00:00
RenameIndependentSubregs.cpp RenameIndependentSubregs: Fix infinite loop 2017-06-27 18:28:10 +00:00
ResetMachineFunctionPass.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
SafeStack.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
SafeStackColoring.cpp [safestack] Disable stack coloring by default. 2017-05-19 20:58:48 +00:00
SafeStackColoring.h
SafeStackLayout.cpp
SafeStackLayout.h
ScalarizeMaskedMemIntrin.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
ScheduleDAG.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
ScheduleDAGInstrs.cpp ScheduleDAGInstrs: Fix fixupKills() adding too many kill flags. 2017-06-27 00:58:48 +00:00
ScheduleDAGPrinter.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
ScoreboardHazardRecognizer.cpp [CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2017-02-22 22:32:51 +00:00
ShadowStackGCLowering.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
ShrinkWrap.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
SjLjEHPrepare.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
SlotIndexes.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
SpillPlacement.cpp CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
SpillPlacement.h
Spiller.h
SplitKit.cpp SplitKit: Fix partially live subreg splitting 2017-06-12 20:30:52 +00:00
SplitKit.h SplitKit: Correctly implement partial subregister copies 2017-03-17 00:41:39 +00:00
StackColoring.cpp StackColoring: smarter check for slot overlap 2017-06-12 14:56:02 +00:00
StackMapLivenessAnalysis.cpp LivePhysReg: Use reference instead of pointer in init(); NFC 2016-12-08 00:15:51 +00:00
StackMaps.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
StackProtector.cpp [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-06-07 23:53:32 +00:00
StackSlotColoring.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
TailDuplication.cpp [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-06-07 23:53:32 +00:00
TailDuplicator.cpp Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue" 2017-06-29 13:58:24 +00:00
TargetFrameLoweringImpl.cpp [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-06-06 22:22:41 +00:00
TargetInstrInfo.cpp Move size and alignment information of regclass to TargetRegisterInfo 2017-04-24 18:55:33 +00:00
TargetLoweringBase.cpp [Atomics] Rename and change prototype for atomic memcpy intrinsic 2017-06-16 14:43:59 +00:00
TargetLoweringObjectFileImpl.cpp IR: Replace the "Linker Options" module flag with "llvm.linker.options" named metadata. 2017-06-12 20:10:48 +00:00
TargetOptionsImpl.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
TargetPassConfig.cpp Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue" 2017-06-29 13:58:24 +00:00
TargetRegisterInfo.cpp [Target] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-06-19 22:43:19 +00:00
TargetSchedule.cpp Fix spelling mistake in getRThroughput static function names. NFCI. 2017-06-06 14:25:34 +00:00
TargetSubtargetInfo.cpp [Target] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-06-19 22:43:19 +00:00
TwoAddressInstructionPass.cpp Remove redundant copy in recurrences 2017-06-29 23:11:24 +00:00
UnreachableBlockElim.cpp [UnreachableBlockElim] Check return value of constrainRegClass(). 2017-05-10 06:33:43 +00:00
VirtRegMap.cpp RegAllocPBQP: Do not assign reserved physical register 2017-06-08 21:30:54 +00:00
WinEHPrepare.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
XRayInstrumentation.cpp [XRay] Fix computation of function size subject to XRay threshold 2017-06-09 13:23:23 +00:00

README.txt

//===---------------------------------------------------------------------===//

Common register allocation / spilling problem:

        mul lr, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        ldr r4, [sp, #+52]
        mla r4, r3, lr, r4

can be:

        mul lr, r4, lr
        mov r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

and then "merge" mul and mov:

        mul r4, r4, lr
        str r4, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

It also increase the likelihood the store may become dead.

//===---------------------------------------------------------------------===//

bb27 ...
        ...
        %reg1037 = ADDri %reg1039, 1
        %reg1038 = ADDrs %reg1032, %reg1039, %NOREG, 10
    Successors according to CFG: 0x8b03bf0 (#5)

bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5):
    Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4)
        %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>

Note ADDri is not a two-address instruction. However, its result %reg1037 is an
operand of the PHI node in bb76 and its operand %reg1039 is the result of the
PHI node. We should treat it as a two-address code and make sure the ADDri is
scheduled after any node that reads %reg1039.

//===---------------------------------------------------------------------===//

Use local info (i.e. register scavenger) to assign it a free register to allow
reuse:
        ldr r3, [sp, #+4]
        add r3, r3, #3
        ldr r2, [sp, #+8]
        add r2, r2, #2
        ldr r1, [sp, #+4]  <==
        add r1, r1, #1
        ldr r0, [sp, #+4]
        add r0, r0, #2

//===---------------------------------------------------------------------===//

LLVM aggressively lift CSE out of loop. Sometimes this can be negative side-
effects:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
load [i + R1]
...
load [i + R2]
...
load [i + R3]

Suppose there is high register pressure, R1, R2, R3, can be spilled. We need
to implement proper re-materialization to handle this:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
R1 = X + 4  @ re-materialized
load [i + R1]
...
R2 = X + 7 @ re-materialized
load [i + R2]
...
R3 = X + 15 @ re-materialized
load [i + R3]

Furthermore, with re-association, we can enable sharing:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
T = i + X
load [T + 4]
...
load [T + 7]
...
load [T + 15]
//===---------------------------------------------------------------------===//

It's not always a good idea to choose rematerialization over spilling. If all
the load / store instructions would be folded then spilling is cheaper because
it won't require new live intervals / registers. See 2003-05-31-LongShifts for
an example.

//===---------------------------------------------------------------------===//

With a copying garbage collector, derived pointers must not be retained across
collector safe points; the collector could move the objects and invalidate the
derived pointer. This is bad enough in the first place, but safe points can
crop up unpredictably. Consider:

        %array = load { i32, [0 x %obj] }** %array_addr
        %nth_el = getelementptr { i32, [0 x %obj] }* %array, i32 0, i32 %n
        %old = load %obj** %nth_el
        %z = div i64 %x, %y
        store %obj* %new, %obj** %nth_el

If the i64 division is lowered to a libcall, then a safe point will (must)
appear for the call site. If a collection occurs, %array and %nth_el no longer
point into the correct object.

The fix for this is to copy address calculations so that dependent pointers
are never live across safe point boundaries. But the loads cannot be copied
like this if there was an intervening store, so may be hard to get right.

Only a concurrent mutator can trigger a collection at the libcall safe point.
So single-threaded programs do not have this requirement, even with a copying
collector. Still, LLVM optimizations would probably undo a front-end's careful
work.

//===---------------------------------------------------------------------===//

The ocaml frametable structure supports liveness information. It would be good
to support it.

//===---------------------------------------------------------------------===//

The FIXME in ComputeCommonTailLength in BranchFolding.cpp needs to be
revisited. The check is there to work around a misuse of directives in inline
assembly.

//===---------------------------------------------------------------------===//

It would be good to detect collector/target compatibility instead of silently
doing the wrong thing.

//===---------------------------------------------------------------------===//

It would be really nice to be able to write patterns in .td files for copies,
which would eliminate a bunch of explicit predicates on them (e.g. no side 
effects).  Once this is in place, it would be even better to have tblgen 
synthesize the various copy insertion/inspection methods in TargetInstrInfo.

//===---------------------------------------------------------------------===//

Stack coloring improvements:

1. Do proper LiveStackAnalysis on all stack objects including those which are
   not spill slots.
2. Reorder objects to fill in gaps between objects.
   e.g. 4, 1, <gap>, 4, 1, 1, 1, <gap>, 4 => 4, 1, 1, 1, 1, 4, 4

//===---------------------------------------------------------------------===//

The scheduler should be able to sort nearby instructions by their address. For
example, in an expanded memset sequence it's not uncommon to see code like this:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

Each of the stores is independent, and the scheduler is currently making an
arbitrary decision about the order.

//===---------------------------------------------------------------------===//

Another opportunitiy in this code is that the $0 could be moved to a register:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

This would save substantial code size, especially for longer sequences like
this. It would be easy to have a rule telling isel to avoid matching MOV32mi
if the immediate has more than some fixed number of uses. It's more involved
to teach the register allocator how to do late folding to recover from
excessive register pressure.