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llvm-project/llvm/lib/Target/AArch64
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Chad Rosier 32d4d37e61 [AArch64] Scale offsets by the size of the memory operation. NFC. 
The immediate in the load/store should be scaled by the size of the memory
operation, not the size of the register being loaded/stored.  This change gets
us one step closer to forming LDPSW instructions.  This change also enables
pre- and post-indexing for halfword and byte loads and stores.

llvm-svn: 248804
 		2015-09-29 16:07:32 +00:00
..
AsmParser [AArch64] Improve short-form diags on long-form Match_InvalidOperand. 2015-08-19 17:40:19 +00:00
Disassembler Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC. 2015-09-15 16:17:27 +00:00
InstPrinter Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
MCTargetDesc Untabify. 2015-09-22 11:15:07 +00:00
TargetInfo AArch64: stop trying to take control of all UnknownArch triples. 2014-08-08 08:27:44 +00:00
Utils [AArch64][v8.1a] The "pan" sysreg isn't MSR-specific. NFCI. 2015-08-04 00:55:11 +00:00
AArch64.h [AArch64] Revert r239711 again. We need to discuss how to share code between AArch64 and ARM backend. 2015-06-15 01:56:40 +00:00
AArch64.td [AArch64] Lower READCYCLECOUNTER using MRS PMCCTNR_EL0. 2015-09-01 16:23:45 +00:00
AArch64A53Fix835769.cpp Fix some comment typos. 2015-08-08 18:27:36 +00:00
AArch64A57FPLoadBalancing.cpp MachineRegisterInfo: Remove UsedPhysReg infrastructure 2015-07-14 17:52:07 +00:00
AArch64AddressTypePromotion.cpp [AArch64] Make the naming of the Address Type Promotion pass consistent. 2015-08-05 15:32:23 +00:00
AArch64AdvSIMDScalarPass.cpp [AArch64] Register (existing) AArch64AdvSIMDScalar pass with LLVM pass manager. 2015-08-05 15:18:58 +00:00
AArch64AsmPrinter.cpp Clean up redundant copies of Triple objects. NFC 2015-06-16 15:44:21 +00:00
AArch64BranchRelaxation.cpp [AArch64] Register (existing) AArch64BranchRelaxation pass with LLVM pass manager. 2015-08-05 16:12:10 +00:00
AArch64CallingConvention.h Move most user of TargetMachine::getDataLayout to the Module one 2015-07-16 06:11:10 +00:00
AArch64CallingConvention.td Move most user of TargetMachine::getDataLayout to the Module one 2015-07-16 06:11:10 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64CollectLOH.cpp [AArch64][CollectLOH] Remove an invalid assertion and add a test case exposing it. 2015-08-31 19:02:00 +00:00
AArch64ConditionOptimizer.cpp AArch64: use AddressingModes.h accessors for compare shifts 2015-07-29 16:39:56 +00:00
AArch64ConditionalCompares.cpp wrap OptSize and MinSize attributes for easier and consistent access (NFCI) 2015-08-04 15:49:57 +00:00
AArch64DeadRegisterDefinitionsPass.cpp [AArch64] Register AArch64DeadRegisterDefinition pass with LLVM pass manager. 2015-08-05 17:35:34 +00:00
AArch64ExpandPseudoInsts.cpp [AArch64] Register (existing) AArch64ExpandPseudo pass with LLVM pass manager. 2015-08-05 14:22:53 +00:00
AArch64FastISel.cpp FastISel: Factor out common code; NFC intended 2015-08-26 01:38:00 +00:00
AArch64FrameLowering.cpp Remove redundant TargetFrameLowering::getFrameIndexOffset virtual 2015-08-15 02:32:35 +00:00
AArch64FrameLowering.h Remove redundant TargetFrameLowering::getFrameIndexOffset virtual 2015-08-15 02:32:35 +00:00
AArch64ISelDAGToDAG.cpp Don't raise inexact when lowering ceil, floor, round, trunc. 2015-09-22 11:43:17 +00:00
AArch64ISelLowering.cpp merge vector stores into wider vector stores and fix AArch64 misaligned access TLI hook (PR21711) 2015-09-25 21:49:48 +00:00
AArch64ISelLowering.h [AArch64] Emit clrex in the expanded cmpxchg fail block. 2015-09-22 17:21:44 +00:00
AArch64InstrAtomics.td Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backends 2014-08-18 16:48:58 +00:00
AArch64InstrFormats.td [AArch64] The paired post-increment store instruction has an output register. 2015-09-24 19:21:42 +00:00
AArch64InstrInfo.cpp [Machine Combiner] Refactor machine reassociation code to be target-independent. 2015-09-21 15:09:11 +00:00
AArch64InstrInfo.h MIR Serialization: Serialize the operand's bit mask target flags. 2015-08-18 22:52:15 +00:00
AArch64InstrInfo.td Don't raise inexact when lowering ceil, floor, round, trunc. 2015-09-22 11:43:17 +00:00
AArch64LoadStoreOptimizer.cpp [AArch64] Scale offsets by the size of the memory operation. NFC. 2015-09-29 16:07:32 +00:00
AArch64MCInstLower.cpp Convert some AArch64 code to foreach loops. NFC. 2015-08-03 19:04:32 +00:00
AArch64MCInstLower.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64MachineFunctionInfo.h Fix typo "fuction" noticed in comments in AssumptionCache.h, and also all the other files that have the same typo. All comments, no functionality change! (Merely a "fuctionality" change.) 2015-07-29 22:32:47 +00:00
AArch64PBQPRegAlloc.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64PBQPRegAlloc.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64PerfectShuffle.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64PromoteConstant.cpp Rename inst_range() to instructions() for consistency. NFC 2015-08-06 19:10:45 +00:00
AArch64RegisterInfo.cpp [AArch64] Remove check for Darwin that was needed to decide if x18 should 2015-07-27 19:18:47 +00:00
AArch64RegisterInfo.h Targets: commonize some stack realignment code 2015-07-20 22:51:32 +00:00
AArch64RegisterInfo.td [AArch64] Add v8.1a atomic instructions 2015-06-02 10:58:41 +00:00
AArch64SchedA53.td
…
AArch64SchedA57.td [AArch64] Changes some SchedAlias to WriteRes for Cortex-A57. 2015-04-10 13:19:27 +00:00
AArch64SchedA57WriteRes.td [AArch64] Refines the Cortex-A57 Machine Model 2014-09-29 21:27:36 +00:00
AArch64SchedCyclone.td
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AArch64Schedule.td
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AArch64SelectionDAGInfo.cpp Remove getDataLayout() from TargetSelectionDAGInfo (had no users) 2015-07-09 02:10:08 +00:00
AArch64SelectionDAGInfo.h Remove getDataLayout() from TargetSelectionDAGInfo (had no users) 2015-07-09 02:10:08 +00:00
AArch64StorePairSuppress.cpp Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64Subtarget.cpp Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC. 2015-09-15 16:17:27 +00:00
AArch64Subtarget.h Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC. 2015-09-15 16:17:27 +00:00
AArch64TargetMachine.cpp constify the Function parameter to the TTI creation callback and 2015-09-16 23:38:13 +00:00
AArch64TargetMachine.h Replace string GNU Triples with llvm::Triple in TargetMachine. NFC. 2015-06-11 19:41:26 +00:00
AArch64TargetObjectFile.cpp MC: Clean up MCExpr naming. NFC. 2015-05-30 01:25:56 +00:00
AArch64TargetObjectFile.h [AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents 2015-03-06 13:49:05 +00:00
AArch64TargetTransformInfo.cpp [CostModel][AArch64] Remove amortization factor for some of the vector select instructions 2015-09-09 15:35:02 +00:00
AArch64TargetTransformInfo.h constify the Function parameter to the TTI creation callback and 2015-09-16 23:38:13 +00:00
CMakeLists.txt [AArch64] Revert r239711 again. We need to discuss how to share code between AArch64 and ARM backend. 2015-06-15 01:56:40 +00:00
LLVMBuild.txt Re-commit of r238201 with fix for building with shared libraries. 2015-06-01 12:02:47 +00:00
Makefile
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