forked from OSchip/llvm-project
280 lines
9.0 KiB
LLVM
280 lines
9.0 KiB
LLVM
; RUN: opt %loadPolly -polly-opt-isl -stats -disable-output < %s 2>&1 | FileCheck %s -match-full-lines
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; REQUIRES: asserts
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; void foo_1d(float *A) {
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; for (long i = 0; i < 1024; i++)
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; A[i] += i;
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; }
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;
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; void foo_2d(float *A) {
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; for (long i = 0; i < 1024; i++)
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; for (long j = 0; j < 1024; j++)
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; A[i + j] += i + j;
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; }
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;
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; void foo_3d(float *A) {
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; for (long i = 0; i < 1024; i++)
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; for (long j = 0; j < 1024; j++)
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; for (long k = 0; k < 1024; k++)
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; A[i + j + k] += i + j + k;
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; }
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;
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; void foo_4d(float *A) {
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; for (long i = 0; i < 1024; i++)
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; for (long j = 0; j < 1024; j++)
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; for (long k = 0; k < 1024; k++)
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; for (long l = 0; l < 1024; l++)
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; A[i + j + k + l] += i + j + k + l;
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; }
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;
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; void foo_zero_iterations(float *S) {
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; for (long i = 0; i < 0; i++)
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; A[i] += i;
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; }
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @foo_1d(float* %A) {
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bb:
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br label %bb1
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bb1: ; preds = %bb6, %bb
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%i.0 = phi i64 [ 0, %bb ], [ %tmp7, %bb6 ]
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%exitcond = icmp ne i64 %i.0, 1024
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br i1 %exitcond, label %bb2, label %bb8
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bb2: ; preds = %bb1
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%tmp = sitofp i64 %i.0 to float
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%tmp3 = getelementptr inbounds float, float* %A, i64 %i.0
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%tmp4 = load float, float* %tmp3, align 4
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%tmp5 = fadd float %tmp4, %tmp
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store float %tmp5, float* %tmp3, align 4
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br label %bb6
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bb6: ; preds = %bb2
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%tmp7 = add nuw nsw i64 %i.0, 1
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br label %bb1
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bb8: ; preds = %bb1
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ret void
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}
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define void @foo_2d(float* %A) {
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bb:
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br label %bb2
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bb2: ; preds = %bb14, %bb
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%i.0 = phi i64 [ 0, %bb ], [ %tmp15, %bb14 ]
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%exitcond1 = icmp ne i64 %i.0, 1024
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br i1 %exitcond1, label %bb3, label %bb16
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bb3: ; preds = %bb2
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br label %bb4
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bb4: ; preds = %bb11, %bb3
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%j.0 = phi i64 [ 0, %bb3 ], [ %tmp12, %bb11 ]
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%exitcond = icmp ne i64 %j.0, 1024
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br i1 %exitcond, label %bb5, label %bb13
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bb5: ; preds = %bb4
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%tmp = add nuw nsw i64 %i.0, %j.0
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%tmp6 = sitofp i64 %tmp to float
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%tmp7 = add nuw nsw i64 %i.0, %j.0
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%tmp8 = getelementptr inbounds float, float* %A, i64 %tmp7
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%tmp9 = load float, float* %tmp8, align 4
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%tmp10 = fadd float %tmp9, %tmp6
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store float %tmp10, float* %tmp8, align 4
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br label %bb11
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bb11: ; preds = %bb5
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%tmp12 = add nuw nsw i64 %j.0, 1
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br label %bb4
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bb13: ; preds = %bb4
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br label %bb14
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bb14: ; preds = %bb13
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%tmp15 = add nuw nsw i64 %i.0, 1
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br label %bb2
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bb16: ; preds = %bb2
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ret void
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}
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define void @foo_3d(float* %A) {
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bb:
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br label %bb3
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bb3: ; preds = %bb22, %bb
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%i.0 = phi i64 [ 0, %bb ], [ %tmp23, %bb22 ]
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%exitcond2 = icmp ne i64 %i.0, 1024
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br i1 %exitcond2, label %bb4, label %bb24
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bb4: ; preds = %bb3
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br label %bb5
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bb5: ; preds = %bb19, %bb4
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%j.0 = phi i64 [ 0, %bb4 ], [ %tmp20, %bb19 ]
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%exitcond1 = icmp ne i64 %j.0, 1024
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br i1 %exitcond1, label %bb6, label %bb21
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bb6: ; preds = %bb5
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br label %bb7
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bb7: ; preds = %bb16, %bb6
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%k.0 = phi i64 [ 0, %bb6 ], [ %tmp17, %bb16 ]
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%exitcond = icmp ne i64 %k.0, 1024
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br i1 %exitcond, label %bb8, label %bb18
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bb8: ; preds = %bb7
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%tmp = add nuw nsw i64 %i.0, %j.0
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%tmp9 = add nuw nsw i64 %tmp, %k.0
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%tmp10 = sitofp i64 %tmp9 to float
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%tmp11 = add nuw nsw i64 %i.0, %j.0
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%tmp12 = add nuw nsw i64 %tmp11, %k.0
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%tmp13 = getelementptr inbounds float, float* %A, i64 %tmp12
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%tmp14 = load float, float* %tmp13, align 4
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%tmp15 = fadd float %tmp14, %tmp10
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store float %tmp15, float* %tmp13, align 4
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br label %bb16
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bb16: ; preds = %bb8
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%tmp17 = add nuw nsw i64 %k.0, 1
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br label %bb7
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bb18: ; preds = %bb7
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br label %bb19
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bb19: ; preds = %bb18
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%tmp20 = add nuw nsw i64 %j.0, 1
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br label %bb5
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bb21: ; preds = %bb5
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br label %bb22
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bb22: ; preds = %bb21
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%tmp23 = add nuw nsw i64 %i.0, 1
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br label %bb3
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bb24: ; preds = %bb3
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ret void
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}
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define void @foo_4d(float* %A) {
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bb:
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br label %bb4
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bb4: ; preds = %bb30, %bb
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%i.0 = phi i64 [ 0, %bb ], [ %tmp31, %bb30 ]
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%exitcond3 = icmp ne i64 %i.0, 1024
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br i1 %exitcond3, label %bb5, label %bb32
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bb5: ; preds = %bb4
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br label %bb6
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bb6: ; preds = %bb27, %bb5
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%j.0 = phi i64 [ 0, %bb5 ], [ %tmp28, %bb27 ]
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%exitcond2 = icmp ne i64 %j.0, 1024
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br i1 %exitcond2, label %bb7, label %bb29
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bb7: ; preds = %bb6
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br label %bb8
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bb8: ; preds = %bb24, %bb7
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%k.0 = phi i64 [ 0, %bb7 ], [ %tmp25, %bb24 ]
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%exitcond1 = icmp ne i64 %k.0, 1024
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br i1 %exitcond1, label %bb9, label %bb26
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bb9: ; preds = %bb8
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br label %bb10
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bb10: ; preds = %bb21, %bb9
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%l.0 = phi i64 [ 0, %bb9 ], [ %tmp22, %bb21 ]
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%exitcond = icmp ne i64 %l.0, 1024
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br i1 %exitcond, label %bb11, label %bb23
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bb11: ; preds = %bb10
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%tmp = add nuw nsw i64 %i.0, %j.0
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%tmp12 = add nuw nsw i64 %tmp, %k.0
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%tmp13 = add nuw nsw i64 %tmp12, %l.0
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%tmp14 = sitofp i64 %tmp13 to float
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%tmp15 = add nuw nsw i64 %i.0, %j.0
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%tmp16 = add nuw nsw i64 %tmp15, %k.0
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%tmp17 = add nuw nsw i64 %tmp16, %l.0
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%tmp18 = getelementptr inbounds float, float* %A, i64 %tmp17
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%tmp19 = load float, float* %tmp18, align 4
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%tmp20 = fadd float %tmp19, %tmp14
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store float %tmp20, float* %tmp18, align 4
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br label %bb21
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bb21: ; preds = %bb11
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%tmp22 = add nuw nsw i64 %l.0, 1
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br label %bb10
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bb23: ; preds = %bb10
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br label %bb24
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bb24: ; preds = %bb23
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%tmp25 = add nuw nsw i64 %k.0, 1
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br label %bb8
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bb26: ; preds = %bb8
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br label %bb27
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bb27: ; preds = %bb26
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%tmp28 = add nuw nsw i64 %j.0, 1
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br label %bb6
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bb29: ; preds = %bb6
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br label %bb30
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bb30: ; preds = %bb29
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%tmp31 = add nuw nsw i64 %i.0, 1
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br label %bb4
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bb32: ; preds = %bb4
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ret void
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}
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define void @foo_zero_iterations(float* %A) {
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bb:
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br label %bb1
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bb1: ; preds = %bb6, %bb
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%i.0 = phi i64 [ 0, %bb ], [ %tmp7, %bb6 ]
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%exitcond = icmp ne i64 %i.0, 0
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br i1 %exitcond, label %bb2, label %bb8
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bb2: ; preds = %bb1
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%tmp = sitofp i64 %i.0 to float
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%tmp3 = getelementptr inbounds float, float* %A, i64 %i.0
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%tmp4 = load float, float* %tmp3, align 4
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%tmp5 = fadd float %tmp4, %tmp
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store float %tmp5, float* %tmp3, align 4
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br label %bb6
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bb6: ; preds = %bb2
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%tmp7 = add nuw nsw i64 %i.0, 1
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br label %bb1
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bb8: ; preds = %bb1
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ret void
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}
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; CHECK-DAG: 1 polly-opt-isl - Number of first level tiling applied
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; CHECK-DAG: 9 polly-opt-isl - Number of affine loops optimized
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; CHECK-DAG: 10 polly-opt-isl - Number of band members (original)
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; CHECK-DAG: 10 polly-opt-isl - Number of band members (after scheduler)
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; CHECK-DAG: 12 polly-opt-isl - Number of band members (after optimizer)
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; CHECK-DAG: 10 polly-opt-isl - Number of bands (original)
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; CHECK-DAG: 7 polly-opt-isl - Number of bands (after scheduler)
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; CHECK-DAG: 8 polly-opt-isl - Number of bands (after optimizer)
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; CHECK-DAG: 4 polly-opt-isl - Number of coincident band members (after scheduler)
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; CHECK-DAG: 5 polly-opt-isl - Number of coincident band members (after optimizer)
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; CHECK-DAG: 7 polly-opt-isl - Number of permutable bands (after scheduler)
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; CHECK-DAG: 8 polly-opt-isl - Number of permutable bands (after optimizer)
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; CHECK-DAG: 3 polly-opt-isl - Number of scops optimized
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; CHECK-DAG: 4 polly-opt-isl - Number of scops processed
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; CHECK-DAG: 4 polly-opt-isl - Number of scops rescheduled
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