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llvm-project/llvm/test/CodeGen/MIR/AArch64
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Geoff Berry d46b6e8096 [AArch64] Fold some filled/spilled subreg COPYs 
Summary:
Extend AArch64 foldMemoryOperandImpl() to handle folding spills of
subreg COPYs with read-undef defs like:

  %vreg0:sub_32<def,read-undef> = COPY %WZR; GPR64:%vreg0

by widening the spilled physical source reg and generating:

  STRXui %XZR <fi#0>

as well as folding fills of similar COPYs like:

  %vreg0:sub_32<def,read-undef> = COPY %vreg1; GPR64:%vreg0, GPR32:%vreg1

by generating:

  %vreg0:sub_32<def,read-undef> = LDRWui <fi#0>

Reviewers: MatzeB, qcolombet

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D27425

llvm-svn: 291180
 		2017-01-05 21:51:42 +00:00
..
cfi-def-cfa.mir MIRParser: Use shorter cfi identifiers 2016-07-26 18:20:00 +00:00
expected-target-flag-name.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
generic-virtual-registers-error.mir [GlobalISel] More fix for the size vs. type typo. NFC. 2016-12-22 22:50:34 +00:00
generic-virtual-registers-with-regbank-error.mir [GlobalISel] More fix for the size vs. type typo. NFC. 2016-12-22 22:50:34 +00:00
intrinsics.mir CodeGen: add new "intrinsic" MachineOperand kind. 2016-07-29 20:32:59 +00:00
invalid-target-flag-name.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
lit.local.cfg
…
multiple-lhs-operands.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
spill-fold.mir [AArch64] Fold some filled/spilled subreg COPYs 2017-01-05 21:51:42 +00:00
stack-object-local-offset.mir MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it. 2016-08-24 01:32:41 +00:00
target-flags.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00