forked from OSchip/llvm-project
55 lines
1.9 KiB
LLVM
55 lines
1.9 KiB
LLVM
; RUN: llc < %s -march=mips64el -mcpu=mips4 -target-abi=n64 | FileCheck %s -check-prefix=64
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; RUN: llc < %s -march=mips64el -mcpu=mips64 -target-abi=n64 | FileCheck %s -check-prefix=64
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; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -target-abi=n64 | FileCheck %s -check-prefix=64R2
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declare double @copysign(double, double) nounwind readnone
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declare float @copysignf(float, float) nounwind readnone
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define float @func2(float %d, double %f) nounwind readnone {
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entry:
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; 64: func2
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; 64-DAG: lui $[[T0:[0-9]+]], 32767
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; 64-DAG: ori $[[MSK0:[0-9]+]], $[[T0]], 65535
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; 64-DAG: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]]
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; 64-DAG: dsrl $[[DSRL:[0-9]+]], ${{[0-9]+}}, 63
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; 64-DAG: sll $[[SLL0:[0-9]+]], $[[DSRL]], 0
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; 64-DAG: sll $[[SLL1:[0-9]+]], $[[SLL0]], 31
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; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[SLL1]]
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; 64: mtc1 $[[OR]], $f0
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; 64R2: dext ${{[0-9]+}}, ${{[0-9]+}}, 63, 1
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; 64R2: ins $[[INS:[0-9]+]], ${{[0-9]+}}, 31, 1
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; 64R2: mtc1 $[[INS]], $f0
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%add = fadd float %d, 1.000000e+00
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%conv = fptrunc double %f to float
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%call = tail call float @copysignf(float %add, float %conv) nounwind readnone
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ret float %call
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}
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define double @func3(double %d, float %f) nounwind readnone {
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entry:
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; 64: func3
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; 64-DAG: daddiu $[[T0:[0-9]+]], $zero, 1
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; 64-DAG: dsll $[[T1:[0-9]+]], $[[T0]], 63
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; 64-DAG: daddiu $[[MSK0:[0-9]+]], $[[T1]], -1
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; 64-DAG: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]]
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; 64-DAG: srl $[[SRL:[0-9]+]], ${{[0-9]+}}, 31
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; 64-DAG: sll $[[SLL:[0-9]+]], $[[SRL]], 0
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; 64-DAG: dsll $[[DSLL:[0-9]+]], $[[SLL]], 63
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; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[DSLL]]
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; 64: dmtc1 $[[OR]], $f0
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; 64R2: ext ${{[0-9]+}}, ${{[0-9]+}}, 31, 1
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; 64R2: dins $[[INS:[0-9]+]], ${{[0-9]+}}, 63, 1
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; 64R2: dmtc1 $[[INS]], $f0
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%add = fadd double %d, 1.000000e+00
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%conv = fpext float %f to double
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%call = tail call double @copysign(double %add, double %conv) nounwind readnone
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ret double %call
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}
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