forked from OSchip/llvm-project
287 lines
7.4 KiB
LLVM
287 lines
7.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=sse2 < %s | FileCheck %s
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; PR22428: https://llvm.org/bugs/show_bug.cgi?id=22428
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; f1, f2, f3, and f4 should use an integer logic instruction.
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; f5, f6, f9, and f10 should use an FP (SSE) logic instruction.
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;
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; f7 and f8 are less clear.
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;
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; For f7 and f8, the SSE instructions don't take immediate operands, so if we
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; use one of those, we either have to load a constant from memory or move the
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; scalar immediate value from an integer register over to an SSE register.
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; Optimizing for size may affect that decision. Also, note that there are no
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; scalar versions of the FP logic ops, so if we want to fold a load into a
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; logic op, we have to load or splat a 16-byte vector constant.
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; 1 FP operand, 1 int operand, int result
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define i32 @f1(float %x, i32 %y) {
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; CHECK-LABEL: f1:
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; CHECK: # BB#0:
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; CHECK-NEXT: movd %xmm0, %eax
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; CHECK-NEXT: andl %edi, %eax
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%and = and i32 %bc1, %y
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ret i32 %and
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}
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; Swap operands of the logic op.
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define i32 @f2(float %x, i32 %y) {
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; CHECK-LABEL: f2:
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; CHECK: # BB#0:
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; CHECK-NEXT: movd %xmm0, %eax
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; CHECK-NEXT: andl %edi, %eax
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%and = and i32 %y, %bc1
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ret i32 %and
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}
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; 1 FP operand, 1 constant operand, int result
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define i32 @f3(float %x) {
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; CHECK-LABEL: f3:
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; CHECK: # BB#0:
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; CHECK-NEXT: movd %xmm0, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%and = and i32 %bc1, 1
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ret i32 %and
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}
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; Swap operands of the logic op.
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define i32 @f4(float %x) {
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; CHECK-LABEL: f4:
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; CHECK: # BB#0:
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; CHECK-NEXT: movd %xmm0, %eax
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; CHECK-NEXT: andl $2, %eax
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%and = and i32 2, %bc1
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ret i32 %and
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}
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; 1 FP operand, 1 integer operand, FP result
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define float @f5(float %x, i32 %y) {
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; CHECK-LABEL: f5:
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; CHECK: # BB#0:
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; CHECK-NEXT: movd %edi, %xmm1
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; CHECK-NEXT: pand %xmm1, %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%and = and i32 %bc1, %y
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%bc2 = bitcast i32 %and to float
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ret float %bc2
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}
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; Swap operands of the logic op.
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define float @f6(float %x, i32 %y) {
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; CHECK-LABEL: f6:
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; CHECK: # BB#0:
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; CHECK-NEXT: movd %edi, %xmm1
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; CHECK-NEXT: pand %xmm1, %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%and = and i32 %y, %bc1
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%bc2 = bitcast i32 %and to float
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ret float %bc2
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}
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; 1 FP operand, 1 constant operand, FP result
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define float @f7(float %x) {
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; CHECK-LABEL: f7:
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; CHECK: # BB#0:
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; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; CHECK-NEXT: andps %xmm1, %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%and = and i32 %bc1, 3
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%bc2 = bitcast i32 %and to float
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ret float %bc2
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}
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; Swap operands of the logic op.
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define float @f8(float %x) {
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; CHECK-LABEL: f8:
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; CHECK: # BB#0:
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; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; CHECK-NEXT: andps %xmm1, %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%and = and i32 4, %bc1
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%bc2 = bitcast i32 %and to float
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ret float %bc2
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}
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; 2 FP operands, int result
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define i32 @f9(float %x, float %y) {
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; CHECK-LABEL: f9:
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; CHECK: # BB#0:
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; CHECK-NEXT: pand %xmm1, %xmm0
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; CHECK-NEXT: movd %xmm0, %eax
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%bc2 = bitcast float %y to i32
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%and = and i32 %bc1, %bc2
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ret i32 %and
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}
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; 2 FP operands, FP result
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define float @f10(float %x, float %y) {
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; CHECK-LABEL: f10:
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; CHECK: # BB#0:
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; CHECK-NEXT: andps %xmm1, %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%bc2 = bitcast float %y to i32
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%and = and i32 %bc1, %bc2
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%bc3 = bitcast i32 %and to float
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ret float %bc3
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}
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define float @or(float %x, float %y) {
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; CHECK-LABEL: or:
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; CHECK: # BB#0:
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; CHECK-NEXT: orps %xmm1, %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%bc2 = bitcast float %y to i32
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%and = or i32 %bc1, %bc2
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%bc3 = bitcast i32 %and to float
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ret float %bc3
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}
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define float @xor(float %x, float %y) {
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; CHECK-LABEL: xor:
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; CHECK: # BB#0:
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; CHECK-NEXT: xorps %xmm1, %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%bc2 = bitcast float %y to i32
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%and = xor i32 %bc1, %bc2
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%bc3 = bitcast i32 %and to float
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ret float %bc3
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}
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define float @f7_or(float %x) {
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; CHECK-LABEL: f7_or:
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; CHECK: # BB#0:
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; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; CHECK-NEXT: orps %xmm1, %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%and = or i32 %bc1, 3
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%bc2 = bitcast i32 %and to float
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ret float %bc2
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}
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define float @f7_xor(float %x) {
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; CHECK-LABEL: f7_xor:
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; CHECK: # BB#0:
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; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; CHECK-NEXT: xorps %xmm1, %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%and = xor i32 %bc1, 3
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%bc2 = bitcast i32 %and to float
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ret float %bc2
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}
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; Make sure that doubles work too.
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define double @doubles(double %x, double %y) {
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; CHECK-LABEL: doubles:
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; CHECK: # BB#0:
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; CHECK-NEXT: andps %xmm1, %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast double %x to i64
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%bc2 = bitcast double %y to i64
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%and = and i64 %bc1, %bc2
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%bc3 = bitcast i64 %and to double
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ret double %bc3
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}
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define double @f7_double(double %x) {
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; CHECK-LABEL: f7_double:
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; CHECK: # BB#0:
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; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
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; CHECK-NEXT: andps %xmm1, %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast double %x to i64
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%and = and i64 %bc1, 3
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%bc2 = bitcast i64 %and to double
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ret double %bc2
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}
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; Grabbing the sign bit is a special case that could be handled
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; by movmskps/movmskpd, but if we're not shifting it over, then
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; a simple FP logic op is cheaper.
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define float @movmsk(float %x) {
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; CHECK-LABEL: movmsk:
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; CHECK: # BB#0:
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; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; CHECK-NEXT: andps %xmm1, %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%and = and i32 %bc1, 2147483648
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%bc2 = bitcast i32 %and to float
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ret float %bc2
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}
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define double @bitcast_fabs(double %x) {
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; CHECK-LABEL: bitcast_fabs:
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; CHECK: # BB#0:
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; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast double %x to i64
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%and = and i64 %bc1, 9223372036854775807
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%bc2 = bitcast i64 %and to double
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ret double %bc2
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}
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define float @bitcast_fneg(float %x) {
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; CHECK-LABEL: bitcast_fneg:
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; CHECK: # BB#0:
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; CHECK-NEXT: xorps {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast float %x to i32
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%xor = xor i32 %bc1, 2147483648
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%bc2 = bitcast i32 %xor to float
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ret float %bc2
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}
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define <2 x double> @bitcast_fabs_vec(<2 x double> %x) {
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; CHECK-LABEL: bitcast_fabs_vec:
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; CHECK: # BB#0:
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; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast <2 x double> %x to <2 x i64>
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%and = and <2 x i64> %bc1, <i64 9223372036854775807, i64 9223372036854775807>
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%bc2 = bitcast <2 x i64> %and to <2 x double>
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ret <2 x double> %bc2
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}
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define <4 x float> @bitcast_fneg_vec(<4 x float> %x) {
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; CHECK-LABEL: bitcast_fneg_vec:
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; CHECK: # BB#0:
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; CHECK-NEXT: xorps {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%bc1 = bitcast <4 x float> %x to <4 x i32>
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%xor = xor <4 x i32> %bc1, <i32 2147483648, i32 2147483648, i32 2147483648, i32 2147483648>
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%bc2 = bitcast <4 x i32> %xor to <4 x float>
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ret <4 x float> %bc2
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}
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