forked from OSchip/llvm-project
72 lines
1.9 KiB
LLVM
72 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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define i32 @mask_negated_zext_bool1(i1 %x) {
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; CHECK-LABEL: mask_negated_zext_bool1:
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; CHECK: # BB#0:
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%ext = zext i1 %x to i32
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%neg = sub i32 0, %ext
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%and = and i32 %neg, 1
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ret i32 %and
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}
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define i32 @mask_negated_zext_bool2(i1 zeroext %x) {
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; CHECK-LABEL: mask_negated_zext_bool2:
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; CHECK: # BB#0:
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: retq
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%ext = zext i1 %x to i32
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%neg = sub i32 0, %ext
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%and = and i32 %neg, 1
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ret i32 %and
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}
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define <4 x i32> @mask_negated_zext_bool_vec(<4 x i1> %x) {
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; CHECK-LABEL: mask_negated_zext_bool_vec:
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; CHECK: # BB#0:
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; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%ext = zext <4 x i1> %x to <4 x i32>
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%neg = sub <4 x i32> zeroinitializer, %ext
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%and = and <4 x i32> %neg, <i32 1, i32 1, i32 1, i32 1>
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ret <4 x i32> %and
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}
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define i32 @mask_negated_sext_bool1(i1 %x) {
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; CHECK-LABEL: mask_negated_sext_bool1:
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; CHECK: # BB#0:
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; CHECK-NEXT: andl $1, %edi
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%ext = sext i1 %x to i32
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%neg = sub i32 0, %ext
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%and = and i32 %neg, 1
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ret i32 %and
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}
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define i32 @mask_negated_sext_bool2(i1 zeroext %x) {
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; CHECK-LABEL: mask_negated_sext_bool2:
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; CHECK: # BB#0:
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: retq
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%ext = sext i1 %x to i32
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%neg = sub i32 0, %ext
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%and = and i32 %neg, 1
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ret i32 %and
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}
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define <4 x i32> @mask_negated_sext_bool_vec(<4 x i1> %x) {
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; CHECK-LABEL: mask_negated_sext_bool_vec:
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; CHECK: # BB#0:
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; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%ext = sext <4 x i1> %x to <4 x i32>
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%neg = sub <4 x i32> zeroinitializer, %ext
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%and = and <4 x i32> %neg, <i32 1, i32 1, i32 1, i32 1>
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ret <4 x i32> %and
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}
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