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AArch64
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[AArch64] AArch64CondBrTuningPass generates wrong branch instructions
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2017-06-28 15:09:11 +00:00 |
AMDGPU
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AMDGPU: Remove SITypeRewriter
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2017-06-28 21:38:50 +00:00 |
ARM
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[ARM] Add tGPRwithpc register class and use it for TBB/THH
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2017-06-29 08:45:31 +00:00 |
AVR
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[AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo Erdi
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2017-05-31 06:27:46 +00:00 |
BPF
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bpf: avoid load from read-only sections
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2017-06-16 15:41:16 +00:00 |
Generic
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[SystemZ] Fix trap issue and enable expensive checks.
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2017-06-23 14:30:46 +00:00 |
Hexagon
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Missed a check for UndefVI in r306466
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2017-06-28 15:46:16 +00:00 |
Inputs
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Lanai
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CodeGen: Rename DEBUG_TYPE to match passnames
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2017-05-25 21:26:32 +00:00 |
MIR
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llc: Add ability to parse mir from stdin
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2017-06-06 20:06:57 +00:00 |
MSP430
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[MSP430] Fix data layout string.
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2017-06-23 21:11:45 +00:00 |
Mips
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[mips][msa] Splat.d endianness check
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2017-06-23 09:09:31 +00:00 |
NVPTX
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Add zero-length check to memcpy/memset load store loop expansion
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2017-06-28 13:07:37 +00:00 |
Nios2
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[Nios2] Target registration
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2017-05-29 09:48:30 +00:00 |
PowerPC
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[CGP] add specialization for memcmp expansion with only one basic block
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2017-06-27 23:15:01 +00:00 |
SPARC
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[Solaris] emit .init_array instead of .ctors on Solaris (Sparc/x86)
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2017-06-21 20:36:32 +00:00 |
SystemZ
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[SystemZ] Fix missing emergency spill slot corner case
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2017-06-26 16:50:32 +00:00 |
Thumb
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RegScavenging: Add scavengeRegisterBackwards()
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2017-06-17 02:08:18 +00:00 |
Thumb2
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[ARM] Improve if-conversion for M-class CPUs without branch predictors
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2017-06-28 14:11:15 +00:00 |
WebAssembly
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[WebAssembly] WebAssemblyFastISel getelementptr variable index support
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2017-06-22 21:26:08 +00:00 |
WinEH
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…
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X86
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[LLVM][X86][Goldmont] Adding new target-cpu: Goldmont
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2017-06-29 10:00:33 +00:00 |
XCore
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AsmPrinter: mark the beginning and the end of a function in verbose mode
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2017-05-23 21:22:16 +00:00 |