forked from OSchip/llvm-project
64 lines
2.4 KiB
LLVM
64 lines
2.4 KiB
LLVM
; RUN: opt %loadPolly -polly-codegen-ppcg -polly-acc-dump-code \
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; RUN: -disable-output < %s | \
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; RUN: FileCheck -check-prefix=CODE %s
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; RUN: opt %loadPolly -polly-codegen-ppcg -S < %s | \
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; RUN: FileCheck %s -check-prefix=IR
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; REQUIRES: pollyacc
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; This test case ensures that we properly sign-extend the types we are using.
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; CODE: if (arg >= 1 && arg1 == 0) {
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; CODE: cudaCheckReturn(cudaMemcpy(dev_MemRef_arg3, MemRef_arg3, (arg) * sizeof(double), cudaMemcpyHostToDevice));
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; CODE-NEXT: {
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; CODE-NEXT: dim3 k0_dimBlock(32);
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; CODE-NEXT: dim3 k0_dimGrid(arg >= 1048546 ? 32768 : (arg + 31) / 32);
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; CODE-NEXT: kernel0 <<<k0_dimGrid, k0_dimBlock>>> (dev_MemRef_arg3, dev_MemRef_arg2, arg, arg1);
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; CODE-NEXT: cudaCheckKernel();
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; CODE-NEXT: }
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; CODE: cudaCheckReturn(cudaMemcpy(MemRef_arg2, dev_MemRef_arg2, (arg) * sizeof(double), cudaMemcpyDeviceToHost));
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; CODE-NEXT cudaCheckReturn(cudaFree(dev_MemRef_arg3));
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; CODE-NEXT cudaCheckReturn(cudaFree(dev_MemRef_arg2));
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; CODE: # kernel0
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; CODE-NEXT: for (int c0 = 0; c0 <= (arg - 32 * b0 - 1) / 1048576; c0 += 1)
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; CODE-NEXT: if (arg >= 32 * b0 + t0 + 1048576 * c0 + 1)
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; CODE-NEXT: Stmt_bb6(0, 32 * b0 + t0 + 1048576 * c0);
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; IR: call i8* @polly_initContextCUDA()
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; IR-NEXT: sext i32 %arg to i64
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; IR-NEXT: mul i64
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; IR-NEXT: @polly_allocateMemoryForDevice
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define void @hoge(i32 %arg, i32 %arg1, [1000 x double]* %arg2, double* %arg3) {
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bb:
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br label %bb4
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bb4: ; preds = %bb13, %bb
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br label %bb6
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bb5: ; preds = %bb13
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ret void
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bb6: ; preds = %bb6, %bb4
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%tmp = phi i64 [ 0, %bb4 ], [ %tmp10, %bb6 ]
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%tmp7 = getelementptr inbounds double, double* %arg3, i64 %tmp
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%tmp8 = load double, double* %tmp7, align 8
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%tmp9 = getelementptr inbounds [1000 x double], [1000 x double]* %arg2, i64 0, i64 %tmp
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store double undef, double* %tmp9, align 8
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%tmp10 = add nuw nsw i64 %tmp, 1
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%tmp11 = zext i32 %arg to i64
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%tmp12 = icmp ne i64 %tmp10, %tmp11
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br i1 %tmp12, label %bb6, label %bb13
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bb13: ; preds = %bb6
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%tmp14 = zext i32 %arg1 to i64
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%tmp15 = icmp ne i64 0, %tmp14
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br i1 %tmp15, label %bb4, label %bb5
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}
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