forked from OSchip/llvm-project
94 lines
2.7 KiB
LLVM
94 lines
2.7 KiB
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -pre-RA-sched=source -disable-post-ra | FileCheck %s -check-prefix=CHECK-7A
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; RUN: llc < %s -mtriple=thumbv6m -pre-RA-sched=source -disable-post-ra -mattr=+strict-align | FileCheck %s -check-prefix=CHECK-6M
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define void @t1(i8* nocapture %c) nounwind optsize {
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entry:
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; CHECK-7A-LABEL: t1:
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; CHECK-7A: movs r1, #0
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; CHECK-7A: strd r1, r1, [r0]
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; CHECK-7A: str r1, [r0, #8]
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; CHECK-6M-LABEL: t1:
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; CHECK-6M: movs r1, #0
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; CHECK-6M: str r1, [r0]
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; CHECK-6M: str r1, [r0, #4]
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; CHECK-6M: str r1, [r0, #8]
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call void @llvm.memset.p0i8.i64(i8* align 8 %c, i8 0, i64 12, i1 false)
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ret void
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}
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define void @t2() nounwind ssp {
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entry:
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; CHECK-7A-LABEL: t2:
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; CHECK-7A: vmov.i32 {{q[0-9]+}}, #0x0
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; CHECK-7A: movs r1, #10
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; CHECK-7A: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r2], r1
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; CHECK-7A: vst1.16 {d{{[0-9]+}}, d{{[0-9]+}}}, [r2]
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; CHECK-6M-LABEL: t2:
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; CHECK-6M: movs [[REG:r[0-9]+]], #0
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; CHECK-6M-DAG: str [[REG]], [sp, #20]
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; CHECK-6M-DAG: str [[REG]], [sp, #16]
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; CHECK-6M-DAG: str [[REG]], [sp, #12]
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; CHECK-6M-DAG: str [[REG]], [sp, #8]
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; CHECK-6M-DAG: str [[REG]], [sp, #4]
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; CHECK-6M-DAG: str [[REG]], [sp]
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%buf = alloca [26 x i8], align 1
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%0 = getelementptr inbounds [26 x i8], [26 x i8]* %buf, i32 0, i32 0
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call void @llvm.memset.p0i8.i32(i8* %0, i8 0, i32 26, i1 false)
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call void @something(i8* %0) nounwind
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ret void
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}
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define void @t3(i8* %p) {
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entry:
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; CHECK-7A-LABEL: t3:
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; CHECK-7A: muls [[REG:r[0-9]+]],
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; CHECK-7A: str [[REG]],
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; CHECK-6M-LABEL: t3:
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; CHECK-6M-NOT: muls
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; CHECK-6M: strb [[REG:r[0-9]+]],
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; CHECK-6M: strb [[REG]],
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; CHECK-6M: strb [[REG]],
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; CHECK-6M: strb [[REG]],
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br label %for.body
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for.body:
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%i = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%0 = trunc i32 %i to i8
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call void @llvm.memset.p0i8.i32(i8* %p, i8 %0, i32 4, i1 false)
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call void @something(i8* %p)
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%inc = add nuw nsw i32 %i, 1
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%exitcond = icmp eq i32 %inc, 255
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br i1 %exitcond, label %for.end, label %for.body
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for.end:
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ret void
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}
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define void @t4(i8* %p) {
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entry:
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; CHECK-7A-LABEL: t4:
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; CHECK-7A: muls [[REG:r[0-9]+]],
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; CHECK-7A: str [[REG]],
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; CHECK-6M-LABEL: t4:
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; CHECK-6M: muls [[REG:r[0-9]+]],
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; CHECK-6M: strh [[REG]],
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; CHECK-6M: strh [[REG]],
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br label %for.body
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for.body:
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%i = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%0 = trunc i32 %i to i8
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call void @llvm.memset.p0i8.i32(i8* align 2 %p, i8 %0, i32 4, i1 false)
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call void @something(i8* %p)
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%inc = add nuw nsw i32 %i, 1
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%exitcond = icmp eq i32 %inc, 255
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br i1 %exitcond, label %for.end, label %for.body
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for.end:
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ret void
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}
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declare void @something(i8*) nounwind
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declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind
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