forked from OSchip/llvm-project
75 lines
2.1 KiB
LLVM
75 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=armv7-apple-ios -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8
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; RUN: llc < %s -mtriple=armv7-apple-ios -mcpu=swift | FileCheck %s -check-prefix=SWIFT
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; rdar://8402126
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@x = external global i32* ; <i32**> [#uses=1]
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define void @foo(i32 %a) "frame-pointer"="all" {
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; A8-LABEL: foo:
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; A8: @ %bb.0: @ %entry
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; A8-NEXT: movw r1, :lower16:(L_x$non_lazy_ptr-(LPC0_0+8))
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; A8-NEXT: movt r1, :upper16:(L_x$non_lazy_ptr-(LPC0_0+8))
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; A8-NEXT: LPC0_0:
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; A8-NEXT: ldr r1, [pc, r1]
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; A8-NEXT: ldr r1, [r1]
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; A8-NEXT: str r0, [r1]
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; A8-NEXT: bx lr
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;
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; SWIFT-LABEL: foo:
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; SWIFT: @ %bb.0: @ %entry
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; SWIFT-NEXT: movw r1, :lower16:(L_x$non_lazy_ptr-(LPC0_0+8))
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; SWIFT-NEXT: movt r1, :upper16:(L_x$non_lazy_ptr-(LPC0_0+8))
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; SWIFT-NEXT: LPC0_0:
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; SWIFT-NEXT: ldr r1, [pc, r1]
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; SWIFT-NEXT: ldr r1, [r1]
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; SWIFT-NEXT: str r0, [r1]
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; SWIFT-NEXT: bx lr
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entry:
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%tmp = load i32*, i32** @x ; <i32*> [#uses=1]
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store i32 %a, i32* %tmp
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ret void
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}
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define i32 @t1(i32 %a, i32 %b) "frame-pointer"="all" {
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; A8-LABEL: t1:
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; A8: @ %bb.0: @ %entry
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; A8-NEXT: mov r2, r0
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; A8-NEXT: mov r0, #1
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; A8-NEXT: cmp r2, #10
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; A8-NEXT: bxle lr
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; A8-NEXT: LBB1_1: @ %cond_true
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; A8-NEXT: push {r7, lr}
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; A8-NEXT: mov r7, sp
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; A8-NEXT: mov r0, r1
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; A8-NEXT: bl _foo
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; A8-NEXT: mov r0, #0
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; A8-NEXT: pop {r7, lr}
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; A8-NEXT: bx lr
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;
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; SWIFT-LABEL: t1:
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; SWIFT: @ %bb.0: @ %entry
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; SWIFT-NEXT: mov r2, r0
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; SWIFT-NEXT: mov r0, #1
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; SWIFT-NEXT: cmp r2, #10
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; SWIFT-NEXT: bxle lr
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; SWIFT-NEXT: LBB1_1: @ %cond_true
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; SWIFT-NEXT: push {r7, lr}
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; SWIFT-NEXT: mov r7, sp
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; SWIFT-NEXT: mov r0, r1
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; SWIFT-NEXT: bl _foo
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; SWIFT-NEXT: mov r0, #0
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; SWIFT-NEXT: pop {r7, lr}
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; SWIFT-NEXT: bx lr
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entry:
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%tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1]
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br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
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cond_true: ; preds = %entry
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tail call void @foo( i32 %b )
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ret i32 0
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UnifiedReturnBlock: ; preds = %entry
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ret i32 1
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}
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