forked from OSchip/llvm-project
112 lines
5.0 KiB
YAML
112 lines
5.0 KiB
YAML
# RUN: llc -mtriple=thumbv8m.main -mcpu=cortex-m33 --float-abi=hard --run-pass=arm-pseudo %s -o - | \
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# RUN: FileCheck %s
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--- |
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; ModuleID = 'cmse-vlldm-no-reorder.ll'
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source_filename = "cmse-vlldm-no-reorder.ll"
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target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "thumbv8m.main"
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@g = hidden local_unnamed_addr global float (...)* null, align 4
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@a = hidden local_unnamed_addr global float 0.000000e+00, align 4
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; Function Attrs: nounwind
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define hidden void @f() local_unnamed_addr #0 {
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entry:
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%0 = load float ()*, float ()** bitcast (float (...)** @g to float ()**), align 4
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%call = tail call nnan ninf nsz float %0() #2
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store float %call, float* @a, align 4
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ret void
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}
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; Function Attrs: nounwind
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declare void @llvm.stackprotector(i8*, i8**) #1
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attributes #0 = { nounwind "target-cpu"="cortex-m33" }
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attributes #1 = { nounwind }
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attributes #2 = { nounwind "cmse_nonsecure_call" }
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...
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---
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name: f
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alignment: 2
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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failedISel: false
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tracksRegLiveness: true
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hasWinCFI: false
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registers: []
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liveins: []
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 8
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offsetAdjustment: 0
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maxAlignment: 4
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adjustsStack: true
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hasCalls: true
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stackProtector: ''
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maxCallFrameSize: 0
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cvBytesOfCalleeSavedRegisters: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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localFrameSize: 0
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savePoint: ''
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restorePoint: ''
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fixedStack: []
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stack:
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- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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callSites: []
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constants: []
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machineFunctionInfo: {}
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body: |
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bb.0.entry:
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liveins: $r7, $lr
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$sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
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frame-setup CFI_INSTRUCTION def_cfa_offset 8
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frame-setup CFI_INSTRUCTION offset $lr, -4
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frame-setup CFI_INSTRUCTION offset $r7, -8
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renamable $r0 = t2MOVi32imm @g
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renamable $r0 = t2LDRi12 killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from `float ()** bitcast (float (...)** @g to float ()**)`)
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tBLXNS_CALL killed renamable $r0, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $s0
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renamable $r0 = t2MOVi32imm @a
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VSTRS killed renamable $s0, killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32) into @a)
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$sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r7, def $pc
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...
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# CHECK-LABEL: bb.0.entry:
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# CHECK: $sp = t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, $r4, $r5, $r6, undef $r7, $r8, $r9, $r10, $r11
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# CHECK-NEXT: $r0 = t2BICri $r0, 1, 14 /* CC::al */, $noreg, $noreg
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# CHECK-NEXT: $sp = tSUBspi $sp, 34, 14 /* CC::al */, $noreg
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# CHECK-NEXT: VLSTM $sp, 14 /* CC::al */, $noreg, implicit undef $vpr, implicit undef $fpscr, implicit undef $fpscr_nzcv, implicit undef $q0, implicit undef $q1, implicit undef $q2, implicit undef $q3, implicit undef $q4, implicit undef $q5, implicit undef $q6, implicit undef $q7
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# CHECK-NEXT: $r1 = tMOVr $r0, 14 /* CC::al */, $noreg
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# CHECK-NEXT: $r2 = tMOVr $r0, 14 /* CC::al */, $noreg
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# CHECK-NEXT: $r3 = tMOVr $r0, 14 /* CC::al */, $noreg
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# CHECK-NEXT: $r4 = tMOVr $r0, 14 /* CC::al */, $noreg
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# CHECK-NEXT: $r5 = tMOVr $r0, 14 /* CC::al */, $noreg
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# CHECK-NEXT: $r6 = tMOVr $r0, 14 /* CC::al */, $noreg
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# CHECK-NEXT: $r7 = tMOVr $r0, 14 /* CC::al */, $noreg
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# CHECK-NEXT: $r8 = tMOVr $r0, 14 /* CC::al */, $noreg
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# CHECK-NEXT: $r9 = tMOVr $r0, 14 /* CC::al */, $noreg
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# CHECK-NEXT: $r10 = tMOVr $r0, 14 /* CC::al */, $noreg
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# CHECK-NEXT: $r11 = tMOVr $r0, 14 /* CC::al */, $noreg
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# CHECK-NEXT: $r12 = tMOVr $r0, 14 /* CC::al */, $noreg
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# CHECK-NEXT: t2MSR_M 3072, $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr
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# CHECK-NEXT: tBLXNSr 14 /* CC::al */, $noreg, killed $r0, csr_aapcs, implicit-def $lr, implicit $sp, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $s0
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# CHECK-NEXT: $r12 = VMOVRS $s0, 14 /* CC::al */, $noreg
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# CHECK-NEXT: VLLDM $sp, 14 /* CC::al */, $noreg, implicit-def $q0, implicit-def $q1, implicit-def $q2, implicit-def $q3, implicit-def $q4, implicit-def $q5, implicit-def $q6, implicit-def $q7, implicit-def $vpr, implicit-def $fpscr, implicit-def $fpscr_nzcv
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# CHECK-NEXT: $s0 = VMOVSR $r12, 14 /* CC::al */, $noreg
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# CHECK-NEXT: $sp = tADDspi $sp, 34, 14 /* CC::al */, $noreg
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# CHECK-NEXT: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11
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