forked from OSchip/llvm-project
fe9d6f211f
Allowing imprecise lane masks in case of more than 32 sub register lanes lead to some tricky corner cases, and I need another bugfix for another one. Instead I rather declare lane masks as precise and let tablegen abort if we do not have enough bits. This does not affect any in-tree target, even AMDGPU only needs 16 lanes at the moment. If the 32 lanes turn out to be a problem in the future, then we can easily change the LaneBitmask typedef to uint64_t. Differential Revision: http://reviews.llvm.org/D14557 llvm-svn: 253279 |
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| .. | ||
| FileCheck | ||
| KillTheDoctor | ||
| Misc | ||
| PerfectShuffle | ||
| TableGen | ||
| Target/ARM | ||
| bugpoint | ||
| buildit | ||
| count | ||
| crosstool | ||
| emacs | ||
| fpcmp | ||
| git | ||
| git-svn | ||
| jedit | ||
| kate | ||
| lint | ||
| lit | ||
| llvm-build | ||
| llvm-lit | ||
| not | ||
| release | ||
| testgen | ||
| textmate | ||
| unittest | ||
| valgrind | ||
| vim | ||
| yaml-bench | ||
| DSAclean.py | ||
| DSAextract.py | ||
| GenLibDeps.pl | ||
| GetRepositoryPath | ||
| GetSourceVersion | ||
| LLVMBuild.txt | ||
| Makefile | ||
| UpdateCMakeLists.pl | ||
| bisect | ||
| check-each-file | ||
| clang-parse-diagnostics-file | ||
| codegen-diff | ||
| countloc.sh | ||
| create_ladder_graph.py | ||
| findmisopt | ||
| findoptdiff | ||
| findsym.pl | ||
| getsrcs.sh | ||
| lldbDataFormatters.py | ||
| llvm-compilers-check | ||
| llvm-native-gxx | ||
| llvm.grm | ||
| llvm.natvis | ||
| llvmdo | ||
| llvmgrep | ||
| makellvm | ||
| schedcover.py | ||
| shuffle_fuzz.py | ||
| sort_includes.py | ||
| test_debuginfo.pl | ||
| update_llc_test_checks.py | ||
| wciia.py | ||