llvm-project/llvm/lib/MCA
Andrew Savonichev bba25a9cd8 [MCA] Support carry-over instructions for in-order processors
Instructions that have more uops than the processor's IssueWidth are
issued in multiple cycles.

The patch fixes PR49712.

Differential Revision: https://reviews.llvm.org/D99339
2021-03-26 00:06:19 +03:00
..
HardwareUnits [MCA] Fix for uninitialised member in constructor. NFC 2021-03-24 11:21:59 +00:00
Stages [MCA] Support carry-over instructions for in-order processors 2021-03-26 00:06:19 +03:00
CMakeLists.txt [MCA] Add support for in-order CPUs 2021-03-04 14:08:19 +03:00
CodeEmitter.cpp [MC][Bugfix] Remove redundant parameter for relaxInstruction 2020-04-21 11:06:55 +08:00
Context.cpp [MCA] Disable RCU for InOrderIssueStage 2021-03-24 13:54:04 +03:00
HWEventListener.cpp
InstrBuilder.cpp [MCA] Add support for in-order CPUs 2021-03-04 14:08:19 +03:00
Instruction.cpp [MCA] Improved handling of negative read-advance cycles. 2021-03-23 14:47:23 +00:00
Pipeline.cpp Revert "Remove redundant "std::move"s in return statements" 2020-02-10 07:07:40 -08:00
Support.cpp