Amara Emerson 283b4d6ba3 [GlobalISel] Add G_VECREDUCE_* opcodes for vector reductions. ... These mirror the IR and SelectionDAG intrinsics & nodes. Opcodes added: G_VECREDUCE_SEQ_FADD G_VECREDUCE_SEQ_FMUL G_VECREDUCE_FADD G_VECREDUCE_FMUL G_VECREDUCE_FMAX G_VECREDUCE_FMIN G_VECREDUCE_ADD G_VECREDUCE_MUL G_VECREDUCE_AND G_VECREDUCE_OR G_VECREDUCE_XOR G_VECREDUCE_SMAX G_VECREDUCE_SMIN G_VECREDUCE_UMAX G_VECREDUCE_UMIN Differential Revision: https://reviews.llvm.org/D88750		2020-10-08 10:33:19 -07:00
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generic-vreg-undef-use.mir	GlobalISel: Disallow undef generic virtual register uses	2020-06-30 19:18:01 -04:00
live-ins-01.mir	…
live-ins-02.mir	…
live-ins-03.mir	…
test_copy.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_copy_mismatch_types.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_add.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_addrspacecast.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_bitcast.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_brindirect_is_indirect_branch.mir	[NFC] Remove unnecessary require global-isel from tests	2020-06-15 16:35:18 +02:00
test_g_brjt.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_brjt_is_indirect_branch.mir	[NFC] Remove unnecessary require global-isel from tests	2020-06-15 16:35:18 +02:00
test_g_build_vector.mir	…
test_g_build_vector_trunc.mir	…
test_g_concat_vectors.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_constant.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_dyn_stackalloc.mir	…
test_g_extract.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_fcmp.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_fconstant.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_icmp.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_insert.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_intrinsic.mir	…
test_g_intrinsic_w_side_effects.mir	…
test_g_inttoptr.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_jump_table.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_load.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_memcpy.mir	Fix for PS4 bots after 0b7f6cc71a	2020-08-27 12:47:26 +01:00
test_g_memset.mir	Fix for PS4 bots after 0b7f6cc71a	2020-08-27 12:47:26 +01:00
test_g_merge_values.mir	…
test_g_phi.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_ptr_add.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_ptrmask.mir	GlobalISel: Merge G_PTR_MASK with llvm.ptrmask intrinsic	2020-05-26 11:48:13 -04:00
test_g_ptrtoint.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_select.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_sext_inreg.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_sextload.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_shuffle_vector.mir	…
test_g_store.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_trunc.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_g_zextload.mir	[Test] Tidy up loose ends from LLVM_HAS_GLOBAL_ISEL	2020-08-27 16:36:27 +01:00
test_phis_precede_nonphis.mir	…
test_vector_reductions.mir	[GlobalISel] Add G_VECREDUCE_* opcodes for vector reductions.	2020-10-08 10:33:19 -07:00
verifier-generic-extend-truncate.mir	…
verifier-generic-types-1.mir	…
verifier-generic-types-2.mir	…
verifier-implicit-virtreg-invalid-physreg-liveness.mir	…
verifier-phi-fail0.mir	…
verifier-phi.mir	…
verifier-pseudo-terminators.mir	Simplify MachineVerifier's block-successor verification.	2020-06-06 22:30:51 -04:00
verify-regbankselected.mir	…
verify-regops.mir	…
verify-selected.mir	…