forked from OSchip/llvm-project
49 lines
1.9 KiB
Plaintext
49 lines
1.9 KiB
Plaintext
TODO:
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- Un-bitrot ISel
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- Hook up If-Conversion a la ARM target
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- Hook up all branch analysis functions
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- Instruction scheduling
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- Bundling
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- Dynamic Optimization
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- Testing and bugfixing
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- stop passing FP args in both FP *and* integer regs when not required
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- allocate low (nonstacked) registers more aggressively
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- clean up and thoroughly test the isel patterns.
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- fix stacked register allocation order: (for readability) we don't want
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the out? registers being the first ones used
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- fix up floating point
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(nb http://gcc.gnu.org/wiki?pagename=ia64%20floating%20point )
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- bundling!
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(we will avoid the mess that is:
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http://gcc.gnu.org/ml/gcc/2003-12/msg00832.html )
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- instruction scheduling (hmmmm! ;)
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- counted loop support
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- make integer + FP mul/div more clever (we have fixed pseudocode atm)
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- track and use comparison complements
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INFO:
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- we are strictly LP64 here, no support for ILP32 on HP-UX. Linux users
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don't need to worry about this.
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- i have instruction scheduling/bundling pseudocode, that really works
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(has been tested, albeit at the perl-script level).
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so, before you go write your own, send me an email!
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KNOWN DEFECTS AT THE CURRENT TIME:
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- C++ vtables contain naked function pointers, not function descriptors,
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which is bad. see http://llvm.cs.uiuc.edu/bugs/show_bug.cgi?id=406
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- varargs are broken
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- alloca doesn't work (indeed, stack frame layout is bogus)
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- no support for big-endian environments
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- (not really the backend, but...) the CFE has some issues on IA64.
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these will probably be fixed soon.
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ACKNOWLEDGEMENTS:
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- Chris Lattner (x100)
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- Other LLVM developers ("hey, that looks familiar")
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CONTACT:
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- You can email me at duraid@octopus.com.au. If you find a small bug,
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just email me. If you find a big bug, please file a bug report
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in bugzilla! http://llvm.cs.uiuc.edu is your one stop shop for all
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things LLVM.
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