forked from OSchip/llvm-project
f0f6bba5b2
MIPS I, II, and III have delay slots for floating point comparisons and floating point register transfers (mtc1, mfc1). Currently, these are not taken into account and thus broken code may be generated on these targets. This patch inserts nops as necessary, while attempting to leave the current instruction if it is safe to stay. The tests in this patch were updated by @sajattack Patch by @overdrivenpotato (Marko Mijalkovic <marko.mijalkovic97@gmail.com>) Differential Revision: https://reviews.llvm.org/D115127 |
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| .. | ||
| abs.ll | ||
| add-dsp.ll | ||
| add.ll | ||
| addrspacecast.ll | ||
| and.ll | ||
| arith-fp.ll | ||
| ashr.ll | ||
| atomicrmx.ll | ||
| bitcast.ll | ||
| call.ll | ||
| cvt.ll | ||
| extractelement.ll | ||
| fptosi.ll | ||
| indirectbr.ll | ||
| isel.ll | ||
| lh_lhu.ll | ||
| load-atomic.ll | ||
| load.ll | ||
| lshr.ll | ||
| mul.ll | ||
| not.ll | ||
| or.ll | ||
| ret.ll | ||
| sdiv.ll | ||
| select-dbl.ll | ||
| select-flt.ll | ||
| select-int.ll | ||
| shl.ll | ||
| sqrt.ll | ||
| srem.ll | ||
| store-atomic.ll | ||
| store.ll | ||
| sub.ll | ||
| trap.ll | ||
| udiv.ll | ||
| urem.ll | ||
| xor.ll | ||