forked from OSchip/llvm-project
58 lines
3.2 KiB
LLVM
58 lines
3.2 KiB
LLVM
; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s
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; This tests for a bug that caused a crash in SIRegisterInfo::spillSGPR()
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; which was due to incorrect book-keeping of removed dead frame indices.
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; CHECK-LABEL: {{^}}kernel0:
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define amdgpu_kernel void @kernel0(i32 addrspace(1)* %out, i32 %in) #1 {
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call void asm sideeffect "", "~{v[0:7]}" () #0
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call void asm sideeffect "", "~{v[8:15]}" () #0
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call void asm sideeffect "", "~{v[16:19]}"() #0
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call void asm sideeffect "", "~{v[20:21]}"() #0
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call void asm sideeffect "", "~{v22}"() #0
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%val0 = call <2 x i32> asm sideeffect "; def $0", "=s" () #0
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%val1 = call <4 x i32> asm sideeffect "; def $0", "=s" () #0
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%val2 = call <8 x i32> asm sideeffect "; def $0", "=s" () #0
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%val3 = call <16 x i32> asm sideeffect "; def $0", "=s" () #0
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%val4 = call <2 x i32> asm sideeffect "; def $0", "=s" () #0
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%val5 = call <4 x i32> asm sideeffect "; def $0", "=s" () #0
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%val6 = call <8 x i32> asm sideeffect "; def $0", "=s" () #0
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%val7 = call <16 x i32> asm sideeffect "; def $0", "=s" () #0
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%val8 = call <2 x i32> asm sideeffect "; def $0", "=s" () #0
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%val9 = call <4 x i32> asm sideeffect "; def $0", "=s" () #0
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%val10 = call <8 x i32> asm sideeffect "; def $0", "=s" () #0
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%val11 = call <16 x i32> asm sideeffect "; def $0", "=s" () #0
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%val12 = call <2 x i32> asm sideeffect "; def $0", "=s" () #0
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%val13 = call <4 x i32> asm sideeffect "; def $0", "=s" () #0
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%val14 = call <8 x i32> asm sideeffect "; def $0", "=s" () #0
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%val15 = call <16 x i32> asm sideeffect "; def $0", "=s" () #0
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%val16 = call <2 x i32> asm sideeffect "; def $0", "=s" () #0
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%val17 = call <4 x i32> asm sideeffect "; def $0", "=s" () #0
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%val18 = call <8 x i32> asm sideeffect "; def $0", "=s" () #0
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%val19 = call <16 x i32> asm sideeffect "; def $0", "=s" () #0
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call void asm sideeffect "; use $0", "s"(<2 x i32> %val0) #0
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call void asm sideeffect "; use $0", "s"(<4 x i32> %val1) #0
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call void asm sideeffect "; use $0", "s"(<8 x i32> %val2) #0
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call void asm sideeffect "; use $0", "s"(<16 x i32> %val3) #0
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call void asm sideeffect "; use $0", "s"(<2 x i32> %val4) #0
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call void asm sideeffect "; use $0", "s"(<4 x i32> %val5) #0
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call void asm sideeffect "; use $0", "s"(<8 x i32> %val6) #0
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call void asm sideeffect "; use $0", "s"(<16 x i32> %val7) #0
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call void asm sideeffect "; use $0", "s"(<2 x i32> %val8) #0
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call void asm sideeffect "; use $0", "s"(<4 x i32> %val9) #0
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call void asm sideeffect "; use $0", "s"(<8 x i32> %val10) #0
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call void asm sideeffect "; use $0", "s"(<16 x i32> %val11) #0
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call void asm sideeffect "; use $0", "s"(<2 x i32> %val12) #0
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call void asm sideeffect "; use $0", "s"(<4 x i32> %val13) #0
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call void asm sideeffect "; use $0", "s"(<8 x i32> %val14) #0
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call void asm sideeffect "; use $0", "s"(<16 x i32> %val15) #0
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call void asm sideeffect "; use $0", "s"(<2 x i32> %val16) #0
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call void asm sideeffect "; use $0", "s"(<4 x i32> %val17) #0
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call void asm sideeffect "; use $0", "s"(<8 x i32> %val18) #0
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call void asm sideeffect "; use $0", "s"(<16 x i32> %val19) #0
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ret void
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}
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attributes #0 = { nounwind }
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attributes #1 = { nounwind "amdgpu-waves-per-eu"="10,10" }
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