forked from OSchip/llvm-project
109 lines
2.8 KiB
LLVM
109 lines
2.8 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=gfx940 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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define i64 @lshl_add_u64_v1v(i64 %v, i64 %a) {
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; GCN-LABEL: lshl_add_u64_v1v:
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; GCN: v_lshl_add_u64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 1, v[{{[0-9:]+}}]
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%shl = shl i64 %v, 1
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%add = add i64 %shl, %a
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ret i64 %add
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}
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define i64 @lshl_add_u64_v4v(i64 %v, i64 %a) {
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; GCN-LABEL: lshl_add_u64_v4v:
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; GCN: v_lshl_add_u64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 4, v[{{[0-9:]+}}]
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%shl = shl i64 %v, 4
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%add = add i64 %shl, %a
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ret i64 %add
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}
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define i64 @lshl_add_u64_v5v(i64 %v, i64 %a) {
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; GCN-LABEL: lshl_add_u64_v5v:
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; GCN: v_lshlrev_b64
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; GCN-NEXT: v_lshl_add_u64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 0, v[{{[0-9:]+}}]
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%shl = shl i64 %v, 5
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%add = add i64 %shl, %a
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ret i64 %add
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}
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define i64 @lshl_add_u64_vvv(i64 %v, i64 %s, i64 %a) {
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; GCN-LABEL: lshl_add_u64_vvv:
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; GCN: v_lshlrev_b64
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; GCN-NEXT: v_lshl_add_u64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 0, v[{{[0-9:]+}}]
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%shl = shl i64 %v, %s
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%add = add i64 %shl, %a
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ret i64 %add
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}
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define amdgpu_kernel void @lshl_add_u64_s2v(i64 %v) {
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; GCN-LABEL: lshl_add_u64_s2v:
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; GCN: v_lshl_add_u64 v[{{[0-9:]+}}], s[{{[0-9:]+}}], 2, v[{{[0-9:]+}}]
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%a = load i64, i64* undef
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%shl = shl i64 %v, 2
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%add = add i64 %shl, %a
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store i64 %add, i64* undef
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ret void
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}
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define amdgpu_kernel void @lshl_add_u64_v2s(i64 %a) {
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; GCN-LABEL: lshl_add_u64_v2s:
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; GCN: v_lshl_add_u64 v[{{[0-9:]+}}], v[{{[0-9:]+}}], 2, s[{{[0-9:]+}}]
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%v = load i64, i64* undef
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%shl = shl i64 %v, 2
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%add = add i64 %shl, %a
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store i64 %add, i64* undef
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ret void
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}
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define amdgpu_kernel void @lshl_add_u64_s2s(i64 %v, i64 %a) {
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; GCN-LABEL: lshl_add_u64_s2s:
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; GCN: s_lshl_b64
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; GCN: s_add_u32
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; GCN: s_addc_u32
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%shl = shl i64 %v, 2
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%add = add i64 %shl, %a
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store i64 %add, i64* undef
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ret void
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}
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define i64 @add_u64_vv(i64 %v, i64 %a) {
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; GCN-LABEL: add_u64_vv:
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; GCN: v_lshl_add_u64 v[0:1], v[0:1], 0, v[2:3]
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%add = add i64 %v, %a
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ret i64 %add
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}
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define amdgpu_kernel void @add_u64_sv(i64 %v) {
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; GCN-LABEL: add_u64_sv:
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; GCN: v_lshl_add_u64 v[0:1], s[0:1], 0, v[0:1]
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%a = load i64, i64* undef
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%add = add i64 %v, %a
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store i64 %add, i64* undef
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ret void
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}
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define amdgpu_kernel void @add_u64_vs(i64 %a) {
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; GCN-LABEL: add_u64_vs:
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; GCN: v_lshl_add_u64 v[0:1], v[0:1], 0, s[0:1]
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%v = load i64, i64* undef
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%add = add i64 %v, %a
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store i64 %add, i64* undef
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ret void
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}
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define amdgpu_kernel void @add_u64_ss(i64 %v, i64 %a) {
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; GCN-LABEL: add_u64_ss:
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; GCN: s_add_u32
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; GCN: s_addc_u32 s1, s1, s3
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%add = add i64 %v, %a
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store i64 %add, i64* undef
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ret void
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}
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define i32 @lshl_add_u64_gep(i32 *%p, i64 %a) {
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; GCN-LABEL: lshl_add_u64_gep:
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; GCN: v_lshl_add_u64 v[0:1], v[2:3], 2, v[0:1]
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%gep = getelementptr inbounds i32, i32* %p, i64 %a
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%v = load i32, i32* %gep
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ret i32 %v
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}
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