forked from OSchip/llvm-project
47 lines
1.8 KiB
LLVM
47 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: opt -S -mtriple=amdgcn-- -structurizecfg -si-annotate-control-flow %s | FileCheck -check-prefix=IR %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s
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define void @loop_on_argument(i1 %arg) {
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; IR-LABEL: @loop_on_argument(
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; IR-NEXT: entry:
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; IR-NEXT: br label [[LOOP:%.*]]
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; IR: loop:
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; IR-NEXT: [[PHI_BROKEN:%.*]] = phi i64 [ [[TMP0:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
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; IR-NEXT: [[TMP0]] = call i64 @llvm.amdgcn.if.break.i64(i1 [[ARG:%.*]], i64 [[PHI_BROKEN]])
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; IR-NEXT: store volatile i32 0, i32 addrspace(1)* undef, align 4
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; IR-NEXT: [[TMP1:%.*]] = call i1 @llvm.amdgcn.loop.i64(i64 [[TMP0]])
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; IR-NEXT: br i1 [[TMP1]], label [[EXIT:%.*]], label [[LOOP]]
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; IR: exit:
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; IR-NEXT: call void @llvm.amdgcn.end.cf.i64(i64 [[TMP0]])
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; IR-NEXT: ret void
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;
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; CHECK-LABEL: loop_on_argument:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: v_and_b32_e32 v0, 1, v0
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; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0
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; CHECK-NEXT: s_mov_b64 s[4:5], 0
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; CHECK-NEXT: v_mov_b32_e32 v0, 0
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; CHECK-NEXT: .LBB0_1: ; %loop
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; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: s_and_b64 s[6:7], exec, vcc
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; CHECK-NEXT: s_or_b64 s[4:5], s[6:7], s[4:5]
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; CHECK-NEXT: global_store_dword v[0:1], v0, off
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; CHECK-NEXT: s_waitcnt vmcnt(0)
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; CHECK-NEXT: s_andn2_b64 exec, exec, s[4:5]
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; CHECK-NEXT: s_cbranch_execnz .LBB0_1
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; CHECK-NEXT: ; %bb.2: ; %exit
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; CHECK-NEXT: s_or_b64 exec, exec, s[4:5]
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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entry:
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br label %loop
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loop:
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store volatile i32 0, i32 addrspace(1)* undef
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br i1 %arg, label %exit, label %loop
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exit:
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ret void
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}
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