forked from OSchip/llvm-project
166 lines
7.5 KiB
LLVM
166 lines
7.5 KiB
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 --amdhsa-code-object-version=3 -enable-misched=0 -filetype=obj -o - < %s | llvm-readelf --notes - | FileCheck --check-prefixes=CHECK,GFX700,WAVE64 %s
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; RUN: llc -mattr=-xnack -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=3 -mcpu=gfx803 -enable-misched=0 -filetype=obj -o - < %s | llvm-readelf --notes - | FileCheck --check-prefixes=CHECK,GFX803,WAVE64 %s
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; RUN: llc -mattr=-xnack -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=3 -mcpu=gfx900 -enable-misched=0 -filetype=obj -o - < %s | llvm-readelf --notes - | FileCheck --check-prefixes=CHECK,GFX900,WAVE64 %s
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; RUN: llc -mattr=-xnack -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=3 -mcpu=gfx1010 -enable-misched=0 -filetype=obj -o - < %s | llvm-readelf --notes - | FileCheck --check-prefixes=CHECK,GFX1010,WAVE32 %s
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@var = addrspace(1) global float 0.0
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; CHECK: ---
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; CHECK: amdhsa.kernels:
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; CHECK: - .args:
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; CHECK: .group_segment_fixed_size: 0
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; CHECK: .kernarg_segment_align: 8
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; CHECK: .kernarg_segment_size: 24
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; CHECK: .max_flat_workgroup_size: 1024
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; CHECK: .name: test
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; CHECK: .private_segment_fixed_size: 0
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; CHECK: .sgpr_count: 6
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; CHECK: .symbol: test.kd
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; CHECK: .vgpr_count: {{3|6}}
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; WAVE64: .wavefront_size: 64
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; WAVE32: .wavefront_size: 32
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define amdgpu_kernel void @test(
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half addrspace(1)* %r,
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half addrspace(1)* %a,
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half addrspace(1)* %b) {
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entry:
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%a.val = load half, half addrspace(1)* %a
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%b.val = load half, half addrspace(1)* %b
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%r.val = fadd half %a.val, %b.val
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store half %r.val, half addrspace(1)* %r
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ret void
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}
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; CHECK: - .args:
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; CHECK: .max_flat_workgroup_size: 256
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define amdgpu_kernel void @test_max_flat_workgroup_size(
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half addrspace(1)* %r,
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half addrspace(1)* %a,
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half addrspace(1)* %b) #2 {
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entry:
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%a.val = load half, half addrspace(1)* %a
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%b.val = load half, half addrspace(1)* %b
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%r.val = fadd half %a.val, %b.val
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store half %r.val, half addrspace(1)* %r
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ret void
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}
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; CHECK: .name: num_spilled_sgprs
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; GFX700: .sgpr_spill_count: 38
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; GFX803: .sgpr_spill_count: 22
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; GFX900: .sgpr_spill_count: 48
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; GFX1010: .sgpr_spill_count: 48
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; CHECK: .symbol: num_spilled_sgprs.kd
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define amdgpu_kernel void @num_spilled_sgprs(
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i32 addrspace(1)* %out0, i32 addrspace(1)* %out1, [8 x i32],
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i32 addrspace(1)* %out2, i32 addrspace(1)* %out3, [8 x i32],
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i32 addrspace(1)* %out4, i32 addrspace(1)* %out5, [8 x i32],
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i32 addrspace(1)* %out6, i32 addrspace(1)* %out7, [8 x i32],
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i32 addrspace(1)* %out8, i32 addrspace(1)* %out9, [8 x i32],
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i32 addrspace(1)* %outa, i32 addrspace(1)* %outb, [8 x i32],
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i32 addrspace(1)* %outc, i32 addrspace(1)* %outd, [8 x i32],
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i32 addrspace(1)* %oute, i32 addrspace(1)* %outf, [8 x i32],
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i32 %in0, i32 %in1, i32 %in2, i32 %in3, [8 x i32],
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i32 %in4, i32 %in5, i32 %in6, i32 %in7, [8 x i32],
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i32 %in8, i32 %in9, i32 %ina, i32 %inb, [8 x i32],
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i32 %inc, i32 %ind, i32 %ine, i32 %inf) #0 {
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entry:
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store i32 %in0, i32 addrspace(1)* %out0
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store i32 %in1, i32 addrspace(1)* %out1
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store i32 %in2, i32 addrspace(1)* %out2
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store i32 %in3, i32 addrspace(1)* %out3
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store i32 %in4, i32 addrspace(1)* %out4
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store i32 %in5, i32 addrspace(1)* %out5
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store i32 %in6, i32 addrspace(1)* %out6
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store i32 %in7, i32 addrspace(1)* %out7
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store i32 %in8, i32 addrspace(1)* %out8
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store i32 %in9, i32 addrspace(1)* %out9
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store i32 %ina, i32 addrspace(1)* %outa
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store i32 %inb, i32 addrspace(1)* %outb
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store i32 %inc, i32 addrspace(1)* %outc
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store i32 %ind, i32 addrspace(1)* %outd
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store i32 %ine, i32 addrspace(1)* %oute
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store i32 %inf, i32 addrspace(1)* %outf
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ret void
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}
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; CHECK: .name: num_spilled_vgprs
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; CHECK: .symbol: num_spilled_vgprs.kd
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; CHECK: .vgpr_spill_count: {{13|14}}
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define amdgpu_kernel void @num_spilled_vgprs() #1 {
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%val0 = load volatile float, float addrspace(1)* @var
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%val1 = load volatile float, float addrspace(1)* @var
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%val2 = load volatile float, float addrspace(1)* @var
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%val3 = load volatile float, float addrspace(1)* @var
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%val4 = load volatile float, float addrspace(1)* @var
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%val5 = load volatile float, float addrspace(1)* @var
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%val6 = load volatile float, float addrspace(1)* @var
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%val7 = load volatile float, float addrspace(1)* @var
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%val8 = load volatile float, float addrspace(1)* @var
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%val9 = load volatile float, float addrspace(1)* @var
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%val10 = load volatile float, float addrspace(1)* @var
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%val11 = load volatile float, float addrspace(1)* @var
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%val12 = load volatile float, float addrspace(1)* @var
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%val13 = load volatile float, float addrspace(1)* @var
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%val14 = load volatile float, float addrspace(1)* @var
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%val15 = load volatile float, float addrspace(1)* @var
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%val16 = load volatile float, float addrspace(1)* @var
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%val17 = load volatile float, float addrspace(1)* @var
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%val18 = load volatile float, float addrspace(1)* @var
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%val19 = load volatile float, float addrspace(1)* @var
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%val20 = load volatile float, float addrspace(1)* @var
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%val21 = load volatile float, float addrspace(1)* @var
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%val22 = load volatile float, float addrspace(1)* @var
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%val23 = load volatile float, float addrspace(1)* @var
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%val24 = load volatile float, float addrspace(1)* @var
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%val25 = load volatile float, float addrspace(1)* @var
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%val26 = load volatile float, float addrspace(1)* @var
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%val27 = load volatile float, float addrspace(1)* @var
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%val28 = load volatile float, float addrspace(1)* @var
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%val29 = load volatile float, float addrspace(1)* @var
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%val30 = load volatile float, float addrspace(1)* @var
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store volatile float %val0, float addrspace(1)* @var
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store volatile float %val1, float addrspace(1)* @var
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store volatile float %val2, float addrspace(1)* @var
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store volatile float %val3, float addrspace(1)* @var
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store volatile float %val4, float addrspace(1)* @var
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store volatile float %val5, float addrspace(1)* @var
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store volatile float %val6, float addrspace(1)* @var
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store volatile float %val7, float addrspace(1)* @var
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store volatile float %val8, float addrspace(1)* @var
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store volatile float %val9, float addrspace(1)* @var
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store volatile float %val10, float addrspace(1)* @var
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store volatile float %val11, float addrspace(1)* @var
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store volatile float %val12, float addrspace(1)* @var
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store volatile float %val13, float addrspace(1)* @var
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store volatile float %val14, float addrspace(1)* @var
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store volatile float %val15, float addrspace(1)* @var
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store volatile float %val16, float addrspace(1)* @var
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store volatile float %val17, float addrspace(1)* @var
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store volatile float %val18, float addrspace(1)* @var
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store volatile float %val19, float addrspace(1)* @var
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store volatile float %val20, float addrspace(1)* @var
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store volatile float %val21, float addrspace(1)* @var
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store volatile float %val22, float addrspace(1)* @var
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store volatile float %val23, float addrspace(1)* @var
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store volatile float %val24, float addrspace(1)* @var
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store volatile float %val25, float addrspace(1)* @var
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store volatile float %val26, float addrspace(1)* @var
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store volatile float %val27, float addrspace(1)* @var
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store volatile float %val28, float addrspace(1)* @var
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store volatile float %val29, float addrspace(1)* @var
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store volatile float %val30, float addrspace(1)* @var
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ret void
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}
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; CHECK: amdhsa.version:
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; CHECK-NEXT: - 1
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; CHECK-NEXT: - 0
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attributes #0 = { "amdgpu-num-sgpr"="14" }
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attributes #1 = { "amdgpu-num-vgpr"="20" }
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attributes #2 = { "amdgpu-flat-work-group-size"="1,256" }
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