forked from OSchip/llvm-project
33 lines
1.1 KiB
YAML
33 lines
1.1 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck %s
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---
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name: readfirstlane_s
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: readfirstlane_s
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
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; CHECK: [[INT:%[0-9]+]]:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readfirstlane), [[COPY1]](s32)
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readfirstlane), %0
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...
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---
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name: readfirstlane_v
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: readfirstlane_v
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[INT:%[0-9]+]]:sgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readfirstlane), [[COPY]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readfirstlane), %0
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...
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