forked from OSchip/llvm-project
130 lines
5.3 KiB
YAML
130 lines
5.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX6 %s
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX7 %s
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX7 %s
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s
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---
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name: zextload_local_s32_from_s8_align1
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GFX6-LABEL: name: zextload_local_s32_from_s8_align1
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; GFX6: liveins: $vgpr0
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; GFX6-NEXT: {{ $}}
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; GFX6-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6-NEXT: [[DS_READ_U8_:%[0-9]+]]:vgpr_32 = DS_READ_U8 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s8), addrspace 3)
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; GFX6-NEXT: $vgpr0 = COPY [[DS_READ_U8_]]
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; GFX7-LABEL: name: zextload_local_s32_from_s8_align1
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; GFX7: liveins: $vgpr0
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; GFX7-NEXT: {{ $}}
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; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX7-NEXT: [[DS_READ_U8_:%[0-9]+]]:vgpr_32 = DS_READ_U8 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s8), addrspace 3)
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; GFX7-NEXT: $vgpr0 = COPY [[DS_READ_U8_]]
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; GFX9-LABEL: name: zextload_local_s32_from_s8_align1
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; GFX9: liveins: $vgpr0
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; GFX9-NEXT: {{ $}}
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; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9-NEXT: [[DS_READ_U8_gfx9_:%[0-9]+]]:vgpr_32 = DS_READ_U8_gfx9 [[COPY]], 0, 0, implicit $exec :: (load (s8), addrspace 3)
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; GFX9-NEXT: $vgpr0 = COPY [[DS_READ_U8_gfx9_]]
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%0:vgpr(p3) = COPY $vgpr0
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%1:vgpr(s32) = G_ZEXTLOAD %0 :: (load (s8), align 1, addrspace 3)
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$vgpr0 = COPY %1
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...
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---
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name: zextload_local_s32_from_s16_align2
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GFX6-LABEL: name: zextload_local_s32_from_s16_align2
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; GFX6: liveins: $vgpr0
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; GFX6-NEXT: {{ $}}
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; GFX6-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6-NEXT: [[DS_READ_U16_:%[0-9]+]]:vgpr_32 = DS_READ_U16 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s16), addrspace 3)
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; GFX6-NEXT: $vgpr0 = COPY [[DS_READ_U16_]]
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; GFX7-LABEL: name: zextload_local_s32_from_s16_align2
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; GFX7: liveins: $vgpr0
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; GFX7-NEXT: {{ $}}
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; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX7-NEXT: [[DS_READ_U16_:%[0-9]+]]:vgpr_32 = DS_READ_U16 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s16), addrspace 3)
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; GFX7-NEXT: $vgpr0 = COPY [[DS_READ_U16_]]
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; GFX9-LABEL: name: zextload_local_s32_from_s16_align2
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; GFX9: liveins: $vgpr0
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; GFX9-NEXT: {{ $}}
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; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9-NEXT: [[DS_READ_U16_gfx9_:%[0-9]+]]:vgpr_32 = DS_READ_U16_gfx9 [[COPY]], 0, 0, implicit $exec :: (load (s16), addrspace 3)
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; GFX9-NEXT: $vgpr0 = COPY [[DS_READ_U16_gfx9_]]
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%0:vgpr(p3) = COPY $vgpr0
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%1:vgpr(s32) = G_ZEXTLOAD %0 :: (load (s16), align 2, addrspace 3)
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$vgpr0 = COPY %1
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...
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# ---
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# name: zextload_local_s16_from_s8_align1
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# legalized: true
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# regBankSelected: true
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# tracksRegLiveness: true
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# body: |
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# bb.0:
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# liveins: $vgpr0
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# %0:vgpr(p3) = COPY $vgpr0
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# %1:vgpr(s16) = G_ZEXTLOAD %0 :: (load (s8), align 1, addrspace 3)
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# %2:vgpr(s32) = G_ANYEXT %1
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# $vgpr0 = COPY %2
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# ...
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---
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name: zextload_local_s32_from_s8_align1_offset4095
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GFX6-LABEL: name: zextload_local_s32_from_s8_align1_offset4095
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; GFX6: liveins: $vgpr0
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; GFX6-NEXT: {{ $}}
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; GFX6-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4095, implicit $exec
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; GFX6-NEXT: %2:vgpr_32, dead %4:sreg_64_xexec = V_ADD_CO_U32_e64 [[COPY]], [[V_MOV_B32_e32_]], 0, implicit $exec
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; GFX6-NEXT: [[DS_READ_U8_:%[0-9]+]]:vgpr_32 = DS_READ_U8 %2, 0, 0, implicit $m0, implicit $exec :: (load (s8), addrspace 3)
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; GFX6-NEXT: $vgpr0 = COPY [[DS_READ_U8_]]
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; GFX7-LABEL: name: zextload_local_s32_from_s8_align1_offset4095
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; GFX7: liveins: $vgpr0
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; GFX7-NEXT: {{ $}}
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; GFX7-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX7-NEXT: [[DS_READ_U8_:%[0-9]+]]:vgpr_32 = DS_READ_U8 [[COPY]], 4095, 0, implicit $m0, implicit $exec :: (load (s8), addrspace 3)
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; GFX7-NEXT: $vgpr0 = COPY [[DS_READ_U8_]]
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; GFX9-LABEL: name: zextload_local_s32_from_s8_align1_offset4095
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; GFX9: liveins: $vgpr0
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; GFX9-NEXT: {{ $}}
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; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9-NEXT: [[DS_READ_U8_gfx9_:%[0-9]+]]:vgpr_32 = DS_READ_U8_gfx9 [[COPY]], 4095, 0, implicit $exec :: (load (s8), addrspace 3)
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; GFX9-NEXT: $vgpr0 = COPY [[DS_READ_U8_gfx9_]]
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%0:vgpr(p3) = COPY $vgpr0
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%1:vgpr(s32) = G_CONSTANT i32 4095
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%2:vgpr(p3) = G_PTR_ADD %0, %1
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%3:vgpr(s32) = G_ZEXTLOAD %2 :: (load (s8), align 1, addrspace 3)
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$vgpr0 = COPY %3
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...
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